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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 55 occurrences of 49 keywords
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Results
Found 38 publication records. Showing 38 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
53 | Alexandru Nicolau, Nikil D. Dutt, Rajesh Gupta 0001, Nick Savoiu, Mehrdad Reshadi, Sumit Gupta |
Dynamic Common Sub-Expression Elimination during Scheduling in High-Level Synthesis. |
ISSS |
2002 |
DBLP DOI BibTeX RDF |
common sub-expression elimination, dynamic CSE, parallelizing transformations, high-level synthesis |
29 | Jiun-In Guo, Jui-Cheng Yen |
An Efficient IDCT Processor Design for HDTV Applications. |
J. VLSI Signal Process. |
2003 |
DBLP DOI BibTeX RDF |
inverse discrete cosine transform (IDCT), adder-based implementation, common sub-expression sharing, HDTV, cyclic convolution |
29 | Kavish Seth, S. Srinivasan 0001 |
VLSI Implementation of 2-D DWT/IDWT Cores Using 9/7-Tap Filter Banks Based on the Non-Expansive Symmetric Extension Scheme. |
ASP-DAC/VLSI Design |
2002 |
DBLP DOI BibTeX RDF |
2D-DWT/IDWT Hardware, Non-expansive symmetric Extension, Canonic Signed Digit Arithmetic, Sub-expression Sharing, Low Power |
29 | Xinan Tang, Rakesh Ghiya, Laurie J. Hendren, Guang R. Gao |
Heap Analysis and Optimizations for Threaded Programs. |
IEEE PACT |
1997 |
DBLP DOI BibTeX RDF |
threaded programs, traditional compiler optimizations, loop invariant removal, common sub-expression elimination, dynamically allocated data structures, heap pointer analyses, dependence testing, high quality code generation, EARTH-C compiler, generated multithreaded code, dynamic measurements, performance tradeoffs, optimizations, parallel programming, optimizing compilers, multithreaded architectures, multithreaded programs, heap analysis |
28 | Qiu-Zhong Wu, Yi-He Sun |
An Integrated CAD Tool for ASIC Implementation of Multiplierless FIR Filters with Common Sub-expression Elimination Optimization. |
ESTIMedia |
2005 |
DBLP DOI BibTeX RDF |
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22 | Arash Arfaee, Ali Irturk, Nikolay Laptev, Farzan Fallah, Ryan Kastner |
Xquasher: a tool for efficient computation of multiple linear expressions. |
DAC |
2009 |
DBLP DOI BibTeX RDF |
DSP transforms, common sub-expression elimination, linear expression, multiple constant multiplications, area optimization |
22 | Nitzan Weinberg, David Nagle |
Dynamic Elimination of Pointer-Expressions. |
IEEE PACT |
1998 |
DBLP DOI BibTeX RDF |
pointer-expression, sphinx, sub-expression, SPECint95, memory address, performance analysis, compiler, locality, speech recognition, dynamic, microprocessor, mpeg, cache memory, microarchitecture, jpeg, value, spatial, memory bandwidth, data reuse, temporal, pointer, conditional execution |
20 | J. Ramanujam, Satish Krishnamurthy, Jinpyo Hong, Mahmut T. Kandemir |
Address Code and Arithmetic Optimizations for Embedded Systems. |
ASP-DAC/VLSI Design |
2002 |
DBLP DOI BibTeX RDF |
address arithmetic optimization, array access to scalar access conversion, embedded systems, compiler optimizations, pointers |
14 | Bala Gurumurthy, Vasudev Raghavendra Bidarkar, David Broneske, Thilo Pionteck, Gunter Saake |
What Happens When Two Multi-Query Optimization Paradigms Combine? - A Hybrid Shared Sub-Expression (SSE) and Materialized View Reuse (MVR) Study. |
ADBIS |
2023 |
DBLP DOI BibTeX RDF |
|
14 | Indranil Hatai, Indrajit Chakrabarti, Swapna Banerjee |
A Computationally Efficient Reconfigurable Constant Multiplication Architecture Based on CSD Decoded Vertical-Horizontal Common Sub-Expression Elimination Algorithm. |
IEEE Trans. Circuits Syst. I Regul. Pap. |
2018 |
DBLP DOI BibTeX RDF |
|
14 | Ila Sharma, Anil Kumar 0001, Girish Kumar Singh 0002, Heung-No Lee |
Design of multiplierless cosine modulated filterbank using hybrid technique in sub-expression space. |
DSP |
2016 |
DBLP DOI BibTeX RDF |
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14 | Indranil Hatai, Indrajit Chakrabarti, Swapna Banerjee |
An Efficient Constant Multiplier Architecture Based on Vertical-Horizontal Binary Common Sub-expression Elimination Algorithm for Reconfigurable FIR Filter Synthesis. |
IEEE Trans. Circuits Syst. I Regul. Pap. |
2015 |
DBLP DOI BibTeX RDF |
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14 | Ayesha Khalid, Rajat Sen, Anupam Chattopadhyay |
SI-DFA: Sub-expression integrated Deterministic Finite Automata for Deep Packet Inspection. |
HPSR |
2013 |
DBLP DOI BibTeX RDF |
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14 | Huong Ho, Valek Szwarc, Tad A. Kwasniewski |
Low Complexity Reconfigurable DSP Circuit Implementations Based on Common Sub-expression Elimination. |
J. Signal Process. Syst. |
2010 |
DBLP DOI BibTeX RDF |
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14 | Muhammad Bilal 0001, Shahid Masud |
FIR filter implementation through Speculative Sub-Expression Sharing in image data. |
ICASSP |
2010 |
DBLP DOI BibTeX RDF |
|
14 | Sivaram Gopalakrishnan, Priyank Kalla |
Algebraic techniques to enhance common sub-expression elimination for polynomial system synthesis. |
DATE |
2009 |
DBLP DOI BibTeX RDF |
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14 | Yuen-Hong Alvin Ho, Chi-Un Lei, Hing-Kit Kwan, Ngai Wong |
Optimal Common Sub-Expression Elimination Algorithm of Multiple Constant Multiplications with a Logic Depth Constraint. |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. |
2008 |
DBLP DOI BibTeX RDF |
|
14 | Mohammed Javed Absar, Pol Marchal, Francky Catthoor |
Data-Access Optimization of Embedded Systems Through Selective Inlining Transformation. |
ESTIMedia |
2005 |
DBLP DOI BibTeX RDF |
|
14 | Hunsoo Choo, Khurram Muhammad, Kaushik Roy 0001 |
MRPF: An Architectural Transformation for Synthesis of High-Performance and Low-Power Digital Filters. |
DATE |
2003 |
DBLP DOI BibTeX RDF |
|
14 | Tay-Jyi Lin, Tsung-Hsun Yang, Chein-Wei Jen |
Area-effective FIR filter design for multiplier-less implementation. |
ISCAS (5) |
2003 |
DBLP DOI BibTeX RDF |
|
10 | Chandrashekhar A. Dhote, M. S. Ali |
Materialized View Selection in Data Warehousing. |
ITNG |
2007 |
DBLP DOI BibTeX RDF |
|
10 | Jun Cao, Ayush Goyal, Samuel P. Midkiff, James M. Caruthers |
An Optimizing Compiler for Parallel Chemistry Simulations. |
IPDPS |
2007 |
DBLP DOI BibTeX RDF |
|
10 | Haifeng Zhou, Zhenghui Lin, Wei Cao |
Research on VHDL RTL Synthesis System. |
DELTA |
2002 |
DBLP DOI BibTeX RDF |
VHDL RTL synthesis, ambiguous grammar, language level optimization, inference, formal semantics, parser |
7 | Arthur I. Baars, S. Doaitse Swierstra, Marcos Viera |
Typed transformations of typed abstract syntax. |
TLDI |
2009 |
DBLP DOI BibTeX RDF |
typed transformations, type systems, meta-programming, gadt, common subexpression elimination |
7 | Shrutisagar Chandrasekaran, Abbes Amira |
High Performance FPGA Implementation of the Mersenne Twister. |
DELTA |
2008 |
DBLP DOI BibTeX RDF |
RC1000, FPGA, Mersenne Twister, Handel C |
7 | Oscar Gustafsson, Mikael Olofsson |
Complexity Reduction of Constant Matrix Computations over the Binary Field. |
WAIFI |
2007 |
DBLP DOI BibTeX RDF |
constant multiplication, low-complexity, binary field, Galois field arithmetic |
7 | François Pottier |
From ML type inference to stratified type inference. |
ICFP |
2005 |
DBLP DOI BibTeX RDF |
|
7 | Sumit Gupta, Rajesh K. Gupta 0001, Nikil D. Dutt, Alexandru Nicolau |
Coordinated parallelizing compiler optimizations and high-level synthesis. |
ACM Trans. Design Autom. Electr. Syst. |
2004 |
DBLP DOI BibTeX RDF |
dynamic CSE, parallelizing transformations, presynthesis, embedded systems, high-level synthesis, Code motions, common subexpression elimination |
7 | Nalin Sidahao |
Optimized Field Programmable Gate Array Based Function Evaluation. |
FPL |
2004 |
DBLP DOI BibTeX RDF |
|
7 | Nalin Sidahao, George A. Constantinides, Peter Y. K. Cheung |
Multiple Restricted Multiplication. |
FPL |
2004 |
DBLP DOI BibTeX RDF |
|
7 | Chih-Da Chien, Chien-Chang Lin, Jiun-In Guo, Tien-Fu Chen |
A power-aware IP core generator for the one-dimensional discrete Fourier transform. |
ISCAS (3) |
2004 |
DBLP DOI BibTeX RDF |
|
7 | P. W. Chandana Prasad, M. Maria Dominic, Ashutosh Kumar Singh |
Variable Order Verification Use of Logic Representation. |
ICADL |
2003 |
DBLP DOI BibTeX RDF |
|
7 | Nicolas Boullis, Arnaud Tisserand |
Some Optimizations of Hardware Multiplication by Constant Matrices. |
IEEE Symposium on Computer Arithmetic |
2003 |
DBLP DOI BibTeX RDF |
|
7 | Kuang-Fu Cheng, Sau-Gee Chen |
A low-complexity correlation algorithm. |
ISCAS (5) |
2003 |
DBLP DOI BibTeX RDF |
|
7 | Jiun-In Guo |
A low cost 2-D inverse discrete cosine transform design for image compression. |
ISCAS (4) |
2001 |
DBLP DOI BibTeX RDF |
|
7 | Arthur T. G. Fuller, Behrouz Nowrouzian |
A novel technique for optimization over the canonical signed-digit number space using genetic algorithms. |
ISCAS (2) |
2001 |
DBLP DOI BibTeX RDF |
|
7 | Xuejun Du, Gary D. Hachtel, Bill Lin 0001, A. Richard Newton |
MUSE: a multilevel symbolic encoding algorithm for state assignment. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1991 |
DBLP DOI BibTeX RDF |
|
7 | Vincent A. Busam, Donald E. Englund |
Optimization of expressions in Fortran. |
Commun. ACM |
1969 |
DBLP DOI BibTeX RDF |
DO loops, invariant calculations, optimization, compilation, compilers, FORTRAN, FORTRAN, register allocation, expressions, common subexpressions, subscripts |
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