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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 264 occurrences of 183 keywords
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Results
Found 1581 publication records. Showing 1581 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
76 | Haiyong Wang, Guoliang Shou, Nanjian Wu |
An adaptive frequency synthesizer architecture reducing reference sidebands. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
67 | Saurabh Kumar Singh, T. K. Bhattacharyya, Ashudeb Dutta |
Fully Integrated CMOS Frequency Synthesizer for ZigBee Applications. |
VLSI Design |
2005 |
DBLP DOI BibTeX RDF |
CMOS RF, ZigBee, Phase locked loop, Analog integrated circuits, Frequency synthesizer |
65 | Cyril Lahuec, J. Horan, J. Duigan |
Programmable video clock synthesizer with sub 0.5 ns drift. |
ISCAS (4) |
2002 |
DBLP DOI BibTeX RDF |
|
56 | JinKyung Kim, Sung-Kyu Jung, Ji-Hoon Jung, Sang-Kyung Sung, Kang-Yoon Lee, Chul Nam, Bong Hyuk Park, Sang-Sung Choi |
A Design of the Frequency Synthesizer for UWB Application in 0.13 µm RF CMOS Process. |
DELTA |
2008 |
DBLP DOI BibTeX RDF |
single-sideband (SSB) mixer, UWB, phase-locked loop (PLL), Frequency Synthesizer |
56 | Angel M. Gómez Argüello, João Navarro Jr., Wilhelmus A. M. Van Noije |
A 3.5 mW programmable high speed frequency divider for a 2.4 GHz CMOS frequency synthesizer. |
SBCCI |
2005 |
DBLP DOI BibTeX RDF |
high speed digital circuit, low power, prescaler, frequency synthesizer |
56 | Lei Yang 0019, Cherry Wakayama, C.-J. Richard Shi |
Noise aware behavioral modeling of the E-Delta fractional-N frequency synthesizer. |
ACM Great Lakes Symposium on VLSI |
2005 |
DBLP DOI BibTeX RDF |
jitter noise, PLL, phase noise, frequency synthesizer |
55 | César Caballero-Gaudes, Mikko Valkama, Markku Renfors |
A novel frequency synthesizer concept for wireless communications. |
ISCAS (2) |
2003 |
DBLP DOI BibTeX RDF |
|
55 | Robin R.-B. Sheen, Oscal T.-C. Chen |
A CMOS PLL-based frequency synthesizer for wireless communication systems at 0.9, 1.8, 1.9 and 2.4 GHz. |
ISCAS (4) |
2001 |
DBLP DOI BibTeX RDF |
|
55 | Ping Wu, Kai He |
A CMOS triple-band fractional-N frequency synthesizer for GSM/GPRS/EDGE applications. |
ISCAS (4) |
2001 |
DBLP DOI BibTeX RDF |
|
52 | George Giorgidze, Henrik Nilsson |
Switched-On Yampa. |
PADL |
2008 |
DBLP DOI BibTeX RDF |
synchronous dataflow languages, hybrid systems, computer music, Functional Reactive Programming |
52 | Christophe Damas, Bernard Lambeau, Axel van Lamsweerde |
Scenarios, goals, and state machines: a win-win partnership for model synthesis. |
SIGSOFT FSE |
2006 |
DBLP DOI BibTeX RDF |
scenario-based elicitation, synthesis of behavior models, incremental learning, labelled transition systems, message sequence charts, goal-oriented requirements engineering, analysis tools, scenario generation |
52 | Toshiaki Tanaka, Tsutomu Kobayashi, Osamu Karatsu |
HARP: FORTRAN to silicon [compilation system]. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1989 |
DBLP DOI BibTeX RDF |
|
46 | Himanshu Arora, Nikolaus Klemmer, Patrick D. Wolf |
A 900 MHz ISM band mash-12 fractional-n frequency synthesizer for 5-Mbps data transmission. |
ACM Great Lakes Symposium on VLSI |
2007 |
DBLP DOI BibTeX RDF |
RMS phase error, delta-sigma, fractional-N, gain mismatch, phase frequency detector, spurs, thermal noise, VCO, phase noise, frequency synthesizer, charge pump |
46 | Wai Shing Lau, Kin-Hong Lee, Kwong-Sak Leung |
A hybridized genetic parallel programming based logic circuit synthesizer. |
GECCO |
2006 |
DBLP DOI BibTeX RDF |
FlowMap, a hybridized genetic parallel programming logic circuit synthesizer, genetic parallel programming, field programmable gate array, technology mapping, LookUp table |
46 | Jun Chen, Rong Luo, Huazhong Yang, Hui Wang 0004 |
A Low Power ROM-Less Direct Digital Frequency Synthesizer with Preset Value Pipelined Accumulator. |
VLSI Design |
2006 |
DBLP DOI BibTeX RDF |
Direct digital frequency synthesizer (DDFS), preset value phase accumulator (PVPA), ROM-less look up table, low power |
46 | Xinhua Chen, Qiuting Huang |
A 9.5mW 4GHz WCDMA frequency synthesizer in 0.13µm CMOS. |
ISLPED |
2005 |
DBLP DOI BibTeX RDF |
low power, CMOS, WCDMA, phase-locked loop, frequency synthesizer |
46 | Vikas Sharma, Chien-Liang Chen, Chung-Ping Chen |
1-V 7-mW dual-band fast-locked frequency synthesizer. |
ACM Great Lakes Symposium on VLSI |
2005 |
DBLP DOI BibTeX RDF |
HiperLAN, WLAN, low-power design, phase-locked loops (PLLs), voltage-controlled oscillator (VCO), phase noise, frequency synthesizer |
46 | Charlotte Y. Lau, Michael H. Perrott |
Fractional-N frequency synthesizer design at the transfer function level using a direct closed loop realization algorithm. |
DAC |
2003 |
DBLP DOI BibTeX RDF |
fractional-N, sigma, design, PLL, frequency, delta, synthesizer |
45 | Ahmed Saad, Khaled M. Sharaf |
A Fully Integrated 2.4GHz CMOS Frequency Synthesizer Using a Ring-Based VCO with Inductive Peaking. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
45 | Ming-Hung Chang, Zong-Xi Yang, Wei Hwang |
A 1.9mW Portable ADPLL-based Frequency Synthesizer for High Speed Clock Generation. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
45 | Yue-Fang Kuo, Ro-Min Weng, Chun-Yu Liu |
A 5.4-GHz Low-Power Swallow-Conterless Frequency Synthesizer with a Nonliear PFD. |
VLSI-SoC |
2006 |
DBLP DOI BibTeX RDF |
|
45 | Sadeka Ali, Martin Margala |
A 2.4-GHz auto-calibration frequency synthesizer with on-chip built-in-self-test solution. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
45 | Faramarz Hendessi, Arash Ghayoori, T. Aaron Gulliver |
A speech synthesizer for Persian text using a neural network with a smooth ergodic HMM. |
ACM Trans. Asian Lang. Inf. Process. |
2005 |
DBLP DOI BibTeX RDF |
TD-PSOLA, Hidden Markov model |
45 | Volodymyr Kratyuk, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram |
A low spur fractional-N frequency synthesizer architecture. |
ISCAS (3) |
2005 |
DBLP DOI BibTeX RDF |
|
45 | Shen-Fu Hsiao, Ming-Yu Tsai, Ming-Chih Chen, Chia-Sheng Wen |
An efficient pass-transistor-logic synthesizer using multiplexers and inverters only. |
ISCAS (3) |
2005 |
DBLP DOI BibTeX RDF |
|
45 | Ting Wu 0003, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram |
An FMDLL based dual-loop frequency synthesizer for 5 GHz WLAN applications. |
ISCAS (4) |
2005 |
DBLP DOI BibTeX RDF |
|
45 | Emre Karalarli, Aydan M. Erkmen, Ismet Erkmen |
Intelligent Gait Synthesizer for Hexapod Walking Rescue Robots. |
ICRA |
2004 |
DBLP DOI BibTeX RDF |
|
45 | Chorng-Sii Hwang, Poki Chen, Hen-Wai Tsao |
A wide-range and fast-locking clock synthesizer IP based on delay-locked loop. |
ISCAS (1) |
2004 |
DBLP DOI BibTeX RDF |
|
45 | Rasoul Dehghani |
A 2.5GHz CMOS Fully-Integrated \Delta\Sigma-Controlled Fractional-N Frequency Synthesizer. |
VLSI Design |
2004 |
DBLP DOI BibTeX RDF |
|
45 | Young-Mi Lee, Ju-Sang Lee, Sang Jin Lee, Ri-A Ju |
Design of a frequency synthesizer for WCDMA in 0.18µm CMOS process. |
ISCAS (1) |
2003 |
DBLP DOI BibTeX RDF |
|
45 | Keliu Shu, Edgar Sánchez-Sinencio, José Silva-Martínez |
A 2.1-GHz monolithic frequency synthesizer with robust phase switching prescaler and loop capacitance scaling. |
ISCAS (4) |
2002 |
DBLP DOI BibTeX RDF |
|
45 | Taoufik Bourdi, Assaad Borjak, Izzet Kale |
Agile multi-band delta-sigma frequency synthesizer architecture. |
ISCAS (5) |
2002 |
DBLP DOI BibTeX RDF |
|
45 | Maw-Ching Lin, Chien-Lung Chen, Ding-Yu Shin, Chin-Hung Lin, Shyh-Jye Jou |
Low-power multiplierless FIR filter synthesizer based on CSD code. |
ISCAS (4) |
2001 |
DBLP DOI BibTeX RDF |
|
45 | Yasuaki Sumi, Shigeki Obote, Naoki Kitai, Ryousuke Furuhashi, Yoshitaka Matsuda, Yutaka Fukui |
PLL frequency synthesizer with an auxiliary programmable divider. |
ISCAS (2) |
1999 |
DBLP DOI BibTeX RDF |
|
45 | Yasuaki Sumi, Shigeki Obote, Naoki Kitai, Ryousuke Furuhashi, Hidekazu Ishii, Yoshitaka Matsuda, Yutaka Fukui |
Dead-zone-less PLL frequency synthesizer by hybrid phase detectors. |
ISCAS (4) |
1999 |
DBLP DOI BibTeX RDF |
|
45 | Sidney S. Fels, Geoffrey E. Hinton |
Glove-TalkII-a neural-network interface which maps gestures to parallel formant speech synthesizer controls. |
IEEE Trans. Neural Networks |
1998 |
DBLP DOI BibTeX RDF |
|
43 | Ahmed Shawky Moussa |
Perception-Based Microtuning over MIDI Networks. |
IEEE Multim. |
2006 |
DBLP DOI BibTeX RDF |
Microtuning, Electronic Synthesizer, Music Software, Audio Communications, MIDI, Computer Music |
41 | Armando Solar-Lezama, Liviu Tancau, Rastislav Bodík, Sanjit A. Seshia, Vijay A. Saraswat |
Combinatorial sketching for finite programs. |
ASPLOS |
2006 |
DBLP DOI BibTeX RDF |
sketching, SAT |
41 | Frank Baumgarte, Christof Faller |
Binaural cue coding-Part I: psychoacoustic fundamentals and design principles. |
IEEE Trans. Speech Audio Process. |
2003 |
DBLP DOI BibTeX RDF |
|
41 | Jane Fedorowicz |
Comments on Price/Performance Patterns of U.S. Computer Systems. |
Commun. ACM |
1981 |
DBLP DOI BibTeX RDF |
|
41 | Michael Andrew Montgomery |
The design and construction of a computer controlled music synthesis system. |
ACM Southeast Regional Conference |
1979 |
DBLP DOI BibTeX RDF |
|
34 | Shuilong Huang, Huainan Ma, Zhihua Wang |
Modeling and simulation to the design of SigmaDelta fractional-N frequency synthesizer. |
DATE |
2007 |
DBLP DOI BibTeX RDF |
|
34 | Rangakrishnan Srinivasan, Didem Zeliha Turker, Sang Wook Park, Edgar Sánchez-Sinencio |
A Low-Power Frequency Synthesizer with Quadrature Signal Generation for 2.4 GHz Zigbee Transceiver Applications. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
34 | Adnan Gundel, William N. Carr |
Ultra Low Power CMOS PLL Clock Synthesizer for Wireless Sensor Nodes. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
34 | Shuilong Huang, Zhihua Wang |
A dual-slope PFD/CP frequency synthesizer architecture with an adaptive self-tuning algorithm. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
34 | Adnan Gundel, William N. Carr |
A Low Jitter CMOS PLL Clock Synthesizer with 20-400 MHz Locking Range. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
34 | Meng-Ting Tsai, Ching-Yuan Yang |
A frequency synthesizer realized by a transformer-based voltage-controlled oscillator for IEEE 802.11a/b/g channels. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
34 | Yi-Da Wu, Chang-Ming Lai, Chih-Yuan Chou, Po-Chiun Huang |
An OPLL-DDS based frequency synthesizer for DCS-1800 receiver. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
34 | Abdulrahman Al-Humaidan, Saleh R. Al-Araji, Mahmoud Al-Qutayri |
Frequency Synthesizer for Wireless Applications using TDTL. |
APCCAS |
2006 |
DBLP DOI BibTeX RDF |
|
34 | Shuilong Huang, Zhihua Wang, Huainan Ma |
A Fast 1.9 GHz Fractional-N/Integer Frequency Synthesizer with a Self-tuning Algorithm. |
APCCAS |
2006 |
DBLP DOI BibTeX RDF |
|
34 | Fei Wang, Jianyu Zhang, Xuan Wang, Jinmei Lai, Chengshou Sun |
Design of A 2.4-GHz integrated frequency synthesizer. |
ASP-DAC |
2005 |
DBLP DOI BibTeX RDF |
|
34 | Shuenn-Yuh Lee, Chung-Han Cheng, Ming-Feng Huang, Shyh-Chyang Lee |
A 1-V 2.4-GHz low-power fractional-N frequency synthesizer with sigma-delta modulator controller. |
ISCAS (3) |
2005 |
DBLP DOI BibTeX RDF |
|
34 | Ching-Yuan Yang, Jen-Wen Chen, Meng-Ting Tsai |
A high-frequency phase-compensation fractional-N frequency synthesizer. |
ISCAS (5) |
2005 |
DBLP DOI BibTeX RDF |
|
34 | Joohwan Park, Franco Maloberti |
Phase noise improvement in fractional-N synthesizer with 90° phase shift lock. |
ISCAS (1) |
2003 |
DBLP DOI BibTeX RDF |
|
34 | Esdras Juárez-Hernández, Alejandro Díaz-Sánchez, Esteban Tlelo-Cuautle |
A 1.35 GHz CMOS wideband frequency synthesizer for mobile communications. |
ISCAS (2) |
2003 |
DBLP DOI BibTeX RDF |
|
34 | J. M. Pierre Langlois, Dhamin Al-Khalili |
Hardware optimized direct digital frequency synthesizer architecture with 60 dBc spectral purity. |
ISCAS (5) |
2002 |
DBLP DOI BibTeX RDF |
|
34 | A. E. Hussein, Mohamed I. Elmasry |
Fractional-N frequency synthesizer for wireless communications. |
ISCAS (4) |
2002 |
DBLP DOI BibTeX RDF |
|
34 | Shigeki Obote, Yasuaki Sumi, Naoki Kitai, Yutaka Fukui, Yoshio Itoh |
Performance improvement in a binary phase comparator type PLL frequency synthesizer. |
ISCAS (4) |
1999 |
DBLP DOI BibTeX RDF |
|
34 | Sun-Yen Tan, Stephen B. Furber, Wen-Fang Yen |
The Design of an Asynchronous VHDL Synthesizer. |
DATE |
1998 |
DBLP DOI BibTeX RDF |
Synthesis, VHDL, Asynchronous |
34 | Thomas W. Reps, Tim Teitelbaum |
The Synthesizer Generator. |
Software Development Environments (SDE) |
1984 |
DBLP DOI BibTeX RDF |
|
32 | Fatima Chouireb, Mhania Guerti |
Towards a high quality Arabic speech synthesis system based on neural networks and residual excited vocal tract model. |
Signal Image Video Process. |
2008 |
DBLP DOI BibTeX RDF |
Phonetic and acoustic segmentation, Residual excitation, Prosodic database, Prosodic-information synthesizer, Neural networks, Natural language processing, Text-to-speech synthesis |
32 | Luciano Severino de Paula, Altamiro Amadeu Susin, Sergio Bampi |
A wide band CMOS differential voltage-controlled ring oscillator. |
SBCCI |
2008 |
DBLP DOI BibTeX RDF |
SSB mixer, wide-band oscillators, voltage-controlled oscillator, frequency synthesizer |
32 | Sau-Gee Chen, Jen-Chuan Chih, Jun-Yi Chou |
Direct Digital Frequency Synthesis Based on a Two-Level Table-Lookup Scheme. |
J. VLSI Signal Process. |
2006 |
DBLP DOI BibTeX RDF |
direct digital frequency synthesizer, DDFS algorithm, two-level table lookup scheme |
32 | Michael H. Perrott |
Fast and accurate behavioral simulation of fractional-N frequency synthesizers and other PLL/DLL circuits. |
DAC |
2002 |
DBLP DOI BibTeX RDF |
fractional-N, sigma, PLL, frequency, delta, DLL, synthesizer |
32 | Thierry Guiard-Marigny, Nicolas Tsingos, Ali Adjoudani, Christian Benoît, Marie-Paule Gascuel |
3D Models Of The Lips For Realistic Speech Animation. |
CA |
1996 |
DBLP DOI BibTeX RDF |
audio-visual systems, realistic images, lip modelling, realistic speech animation, audio visual articulatory speech synthesizer, border contours, vermilion zone, lip shape, speaker dependent conformations, natural lips, French speaker, reference lip shapes, lip contact, natural languages, computer animation, 3D models, implicit surfaces, speech synthesis, volumetric model, continuous functions, human face, geometrical analysis, algebraic equations |
32 | B. M. Subraya, Anshul Kumar, Shashi Kumar |
An HOL based framework for design of correct high level synthesizers. |
VLSI Design |
1995 |
DBLP DOI BibTeX RDF |
HOL based framework, high level synthesizer design, design correctness guarantee, verifiable templates, synthesis module correctness, formal verification, high level synthesis, modularity, formal logic, higher order logic, verification process, formal framework |
31 | Armando Solar-Lezama, Gilad Arnold, Liviu Tancau, Rastislav Bodík, Vijay A. Saraswat, Sanjit A. Seshia |
Sketching stencils. |
PLDI |
2007 |
DBLP DOI BibTeX RDF |
sketching, SAT, stencil |
31 | Rupal Patel, Michael Everett, Eldar Sadikov |
Loudmouth: : modifying text-to-speech synthesis in noise. |
ASSETS |
2006 |
DBLP DOI BibTeX RDF |
text-to-speech synthesis (TTS), speech synthesis, augmentative and alternative communication (AAC) |
31 | Jicheng Fu, Farokh B. Bastani, I-Ling Yen |
Automated AI Planning and Code Pattern Based Code Synthesis. |
ICTAI |
2006 |
DBLP DOI BibTeX RDF |
Automated code synthesis, Graphplan, AI planning, Embedded real-time systems, Code patterns |
31 | Shen-Fu Hsiao, Ming-Yu Tsai, Chia-Sheng Wen |
Efficient Pass-Transistor-Logic Synthesis for Sequential Circuits. |
APCCAS |
2006 |
DBLP DOI BibTeX RDF |
|
31 | Chi-Yi Hwang, Yung-Ching Hsieh, Youn-Long Lin, Yu-Chin Hsu |
An efficient layout style for two-metal CMOS leaf cells and its automatic synthesis. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1993 |
DBLP DOI BibTeX RDF |
|
27 | Xiaoke Tang, Xu Zhao, Ang Hu, Dongsheng Liu, Zirui Jin |
A 433/2400 MHz dual-band frequency synthesizer with glitch-free phase-interpolated frequency divider and hybrid post-synthesizer. |
Microelectron. J. |
2021 |
DBLP DOI BibTeX RDF |
|
27 | Young-Soo Ryu, Young-Shig Choi |
A DLL Based Clock Synthesizer with Locking Status Indicator A DLL Based Clock Synthesizer with Locking Status Indicator. |
J. Inform. and Commun. Convergence Engineering |
2005 |
DBLP BibTeX RDF |
|
24 | Yang Liu, Ashok Kumar Srivastava, Yao Xu |
A switchable PLL frequency synthesizer and hot carrier effects. |
ACM Great Lakes Symposium on VLSI |
2009 |
DBLP DOI BibTeX RDF |
cmos phase-locked loop, hot carrier effects, jitter, voltage-controlled oscillator, phase noise |
24 | Jintao Jiang, Justin M. Aronoff, Lynne E. Bernstein |
Development of a visual speech synthesizer via second-order isomorphism. |
ICASSP |
2008 |
DBLP DOI BibTeX RDF |
|
24 | Xu Yi, Hongbing Qiu |
Modeling and Simulation of the Locking Process of a 4th Order Microwave Frequency-Hopping PLL Synthesizer. |
CSSE (2) |
2008 |
DBLP DOI BibTeX RDF |
|
24 | José Borges, Igor Couto, Fabíola Oliveira, Tales Imbiriba, Aldebaro Klautau |
GASpeech: A Framework for Automatically Estimating Input Parameters of Klatt's Speech Synthesizer. |
SBRN |
2008 |
DBLP DOI BibTeX RDF |
|
24 | Chunjing Mao, Yong Guan, Yongmei Liu 0010 |
Research and Design of Digital Synthesizer Based on MATLAB. |
ISICA |
2008 |
DBLP DOI BibTeX RDF |
|
24 | Weibo Hu, Chung Len Lee 0001, Xin'an Wang |
Arbitrary Waveform Generator Based on Direct Digital Frequency Synthesizer. |
DELTA |
2008 |
DBLP DOI BibTeX RDF |
|
24 | Ashkan Ashrafi, Aleksandar Milenkovic, Reza R. Adhami |
A 1GHz Direct Digital Frequency Synthesizer Based on the Quasi-Linear Interpolation Method. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
24 | Debashis Mandal, T. K. Bhattacharyya |
7.95mW 2.4GHz Fully-Integrated CMOS Integer N Frequency Synthesizer. |
VLSI Design |
2007 |
DBLP DOI BibTeX RDF |
|
24 | Zdenek Krnoul, Jakub Kanis, Milos Zelezný, Ludek Müller |
Czech Text-to-Sign Speech Synthesizer. |
MLMI |
2007 |
DBLP DOI BibTeX RDF |
Sign speech, machine translation, automatic synthesis |
24 | Lu Ping, Ye Fan 0001, Junyan Ren |
A low-jitter frequency synthesizer with dynamic phase interpolation for high-speed Ethernet. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
24 | Sangho Shin, Kwyro Lee, Sung-Mo Kang |
Low-power 2.4GHz CMOS frequency synthesizer with differentially controlled MOS varactors. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
24 | Shu-Chung Yi, Kun-Tse Lee, Jin-Jia Chen, Chien-Hung Lin |
A Low-Power Efficient Direct Digital Frequency Synthesizer Based on New Two-Level Lookup Table. |
CCECE |
2006 |
DBLP DOI BibTeX RDF |
|
24 | Duk Shin, Atsushi Katayama, Kyoungsik Kim, Hiroyuki Kambara, Makoto Sato, Yasuharu Koike |
Using a MyoKinetic Synthesizer to Control of Virtual Instruments. |
ICAT |
2006 |
DBLP DOI BibTeX RDF |
|
24 | Sami Ayyorgun, Sarut Vanichpun, Wu-chun Feng |
Q-Composer and CpR: a probabilistic synthesizer and regulator of traffic (a probabilistic control of buffer occupancy). |
INFOCOM |
2005 |
DBLP DOI BibTeX RDF |
|
24 | V. J. S. Oliveira, N. Oki |
Low voltage analog synthesizer of orthogonal signals: a current-mode approach. |
ISCAS (4) |
2005 |
DBLP DOI BibTeX RDF |
|
24 | Xuefeng Yu, Foster F. Dai, Yin Shi, Ronghua Zhu |
2 GHz 8-bit CMOS ROM-less direct digital frequency synthesizer. |
ISCAS (5) |
2005 |
DBLP DOI BibTeX RDF |
|
24 | Pooya Torkzadeh, Armin Tajalli, Seyed Mojtaba Atarodi |
A wide tuning range, 1 GHz-2.5 GHz DLL-based fractional frequency synthesizer. |
ISCAS (5) |
2005 |
DBLP DOI BibTeX RDF |
|
24 | Jinn-Shyan Wang, Shiang-Jiun Lin, Chingwei Yeh |
A low-power high-SFDR CMOS direct digital frequency synthesizer. |
ISCAS (2) |
2005 |
DBLP DOI BibTeX RDF |
|
24 | Sreenath Thoka, Randall L. Geiger |
Fast-switching adaptive bandwidth frequency synthesizer using a loop filter with switched zero-resistor array. |
ISCAS (6) |
2005 |
DBLP DOI BibTeX RDF |
|
24 | Hyung-Seuk Kim, Mourad N. El-Gamal |
A 1-V fully integrated CMOS frequency synthesizer for 5-GHz WLAN. |
ISCAS (5) |
2005 |
DBLP DOI BibTeX RDF |
|
24 | Chua-Chin Wang, Yih-Long Tseng, Hsien-Chih She, Chih-Chen Li, Ron Hu |
A 13-bit resolution ROM-less direct digital frequency synthesizer based on a trigonometric quadruple angle formula. |
IEEE Trans. Very Large Scale Integr. Syst. |
2004 |
DBLP DOI BibTeX RDF |
|
24 | Lonce Wyse, Ye Wang 0007, Xinglei Zhu |
Application of a content-based percussive sound synthesizer to packet loss recovery in music streaming. |
ACM Multimedia |
2003 |
DBLP DOI BibTeX RDF |
music streaming, packet error recovery, sound synthesis |
24 | Tsz-Yan Chan |
Using a Text-to-Speech Synthesizer to Generate a Reverse Turing Test. |
ICTAI |
2003 |
DBLP DOI BibTeX RDF |
|
24 | Florean Curticapean, K. I. Palomaki, Jarkko Niittylahti |
Quadrature direct digital frequency synthesizer using an angle rotation algorithm. |
ISCAS (2) |
2003 |
DBLP DOI BibTeX RDF |
|
24 | Dimitrios Soudris, Marios Kesoulis, Christos S. Koukourlis, Adonios Thanailakis, Spyros Blionas |
Alternative Direct Digital Frequency Synthesizer architectures with reduced memory size. |
ISCAS (2) |
2003 |
DBLP DOI BibTeX RDF |
|
24 | K. I. Palomaki, Jarkko Niittylahti |
A low-power, memoryless direct digital frequency synthesizer architecture. |
ISCAS (2) |
2003 |
DBLP DOI BibTeX RDF |
|
24 | Jouko Vankka, Jonne Lindeberg, Kari Halonen |
Direct digital synthesizer with tunable delta sigma modulator. |
ISCAS (1) |
2003 |
DBLP DOI BibTeX RDF |
|
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