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Publication years (Num. hits)
2000-2006 (18) 2007-2009 (15) 2010-2020 (5)
Publication types (Num. hits)
article(9) incollection(1) inproceedings(28)
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The graphs summarize 55 occurrences of 48 keywords

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Found 38 publication records. Showing 38 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
39Jens Karrenbauer, Lukas Gerlach 0001, Guillermo Payá Vayá, Holger Blume Design Space Exploration Framework for Tensilica-Based Digital Audio Processors in Hearing Aids. Search on Bibsonomy MOCAST The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
39Anirudh Ingole, Vanita Agarwal Instruction Set Design for Elementary Set in Tensilica Xtensa. Search on Bibsonomy ICCCNT The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
39D. R. Vasanthi, R. Anusha, B. K. Vinay Implementation of Robust Compression Technique Using LZ77 Algorithm on Tensilica's Xtensa Processor. Search on Bibsonomy ICIT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
39 Tensilica. Search on Bibsonomy Encyclopedia of Parallel Computing The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
36Newton Cheung, Jörg Henkel, Sri Parameswaran Rapid Configuration and Instruction Selection for an ASIP: A Case Study. Search on Bibsonomy DATE The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
29Rehan Hameed, Wajahat Qadeer, Megan Wachs, Omid Azizi, Alex Solomatnikov, Benjamin C. Lee, Stephen Richardson, Christos Kozyrakis, Mark Horowitz Understanding sources of inefficiency in general-purpose chips. Search on Bibsonomy ISCA The full citation details ... 2010 DBLP  DOI  BibTeX  RDF tensilica, energy efficiency, chip multiprocessor, customization, ASIC, h.264, high performance
29Krutartha Patel, Sri Parameswaran LOCS: a low overhead profiler-driven design flow for security of MPSoCs. Search on Bibsonomy CODES+ISSS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF tensilica, architecture, mpsoc, execution profile, code injection
29Krutartha Patel, Sri Parameswaran SHIELD: a software hardware design methodology for security and reliability of MPSoCs. Search on Bibsonomy DAC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF bit flips, tensilica, architecture, multiprocessors, code injection
29Krutartha Patel, Sridevan Parameswaran, Seng Lin Shee Ensuring secure program execution in multiprocessor embedded systems: a case study. Search on Bibsonomy CODES+ISSS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF embedded system processors, tensilica, security, multiprocessors, code injection attacks
18Alex Solomatnikov, Amin Firoozshahian, Ofer Shacham, Zain Asgar, Megan Wachs, Wajahat Qadeer, Stephen Richardson, Mark Horowitz Using a configurable processor generator for computer architecture prototyping. Search on Bibsonomy MICRO The full citation details ... 2009 DBLP  DOI  BibTeX  RDF computer architecture prototyping, configurable/extensible processor generator, memory system architecture, reconfigurable architecture, VLSI design
18Marghoob Mohiyuddin, Mark Murphy, Leonid Oliker, John Shalf, John Wawrzynek, Samuel Williams 0001 A design methodology for domain-optimized power-efficient supercomputing. Search on Bibsonomy SC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
18Seng Lin Shee, Andrea Erdos, Sri Parameswaran Architectural Exploration of Heterogeneous Multiprocessor Systems for JPEG. Search on Bibsonomy Int. J. Parallel Program. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF design, architecture, multiprocessor, SoC, pipelines, ASIPs, heterogeneous system
18Najwa Aaraj, Anand Raghunathan, Niraj K. Jha Analysis and design of a hardware/software trusted platform module for embedded systems. Search on Bibsonomy ACM Trans. Embed. Comput. Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF embedded systems, multiprocessor systems, Custom instructions
18Kwang-Ting (Tim) Cheng From the EIC. Search on Bibsonomy IEEE Des. Test Comput. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Chris Rowen, runtime power monitoring, NoC, hybrid approach, simultaneous switching noise, RFIC
18Sebastien Fontaine, Sylvain Goyette, J. M. Pierre Langlois, Guy Bois Acceleration of a 3D target tracking algorithm using an application specific instruction set processor. Search on Bibsonomy ICCD The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
18Kang Zhao, Jinian Bian, Sheqin Dong, Yang Song 0002, Satoshi Goto Automated Specific Instruction Customization Methodology for Multimedia Processor Acceleration. Search on Bibsonomy ISQED The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
18Najwa Aaraj, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha Hybrid Architectures for Efficient and Secure Face Authentication in Embedded Systems. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
18Nachiketh R. Potlapally, Srivaths Ravi 0001, Anand Raghunathan, Ruby B. Lee, Niraj K. Jha Configuration and Extension of Embedded Processors to Optimize IPSec Protocol Execution. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
18Fei Sun, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha A Synthesis Methodology for Hybrid Custom Instruction and Coprocessor Generation for Extensible Processors. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
18Erik Jan Marinissen, Axel Jantsch, Nicola Nicolici DATE 07 workshop on diagnostic services in NoCs. Search on Bibsonomy IEEE Des. Test Comput. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF diagnostic services, DATE 2007, network on chip, NoC
18Seng Lin Shee, Sri Parameswaran Design Methodology for Pipelined Heterogeneous Multiprocessor System. Search on Bibsonomy DAC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
18Laura Pozzi, Kubilay Atasu, Paolo Ienne Exact and approximate algorithms for the extension of embedded processor instruction sets. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
18Najwa Aaraj, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha Architectures for efficient face authentication in embedded systems. Search on Bibsonomy DATE Designers' Forum The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
18Divya Arora, Anand Raghunathan, Srivaths Ravi 0001, Niraj K. Jha Architectural support for safe software execution on embedded processors. Search on Bibsonomy CODES+ISSS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF type safety, memory safety, extensible processors
18Seng Lin Shee, Andrea Erdos, Sri Parameswaran Heterogeneous multiprocessor implementations for JPEG: : a case study. Search on Bibsonomy CODES+ISSS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
18Grant Martin Recent Developments in Configurable and Extensible Processors. Search on Bibsonomy ASAP The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
18Nachiketh R. Potlapally, Srivaths Ravi 0001, Anand Raghunathan, Ruby B. Lee, Niraj K. Jha Impact of Configurability and Extensibility on IPSec Protocol Execution on Embedded Processors. Search on Bibsonomy VLSI Design The full citation details ... 2006 DBLP  DOI  BibTeX  RDF Performance, Embedded Systems, Security Protocols, Configurability, Extensibility, Embedded Processors, IPSec, Embedded Security
18Fei Sun, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha Hybrid Custom Instruction and Co-Processor Synthesis Methodology for Extensible Processors. Search on Bibsonomy VLSI Design The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
18Maria Mbaye, Normand Bélanger, Yvon Savaria, Samuel Pierre Application specific instruction-set processor generation for video processing based on loop optimization. Search on Bibsonomy ISCAS (4) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
18Fei Sun, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha Synthesis of Application-Specific Heterogeneous Multiprocessor Architectures Using Extensible Processors. Search on Bibsonomy VLSI Design The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
18Sadik Ezer, Scott Johnson Smart diagnostics for configurable processor verification. Search on Bibsonomy DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF embedded test-bench control, coverage, functional verification, diagnostics, configurable processors
18Yunsi Fei, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha A hybrid energy-estimation technique for extensible processors. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
18Dan Hillman Using Mobilize Power Management IP for Dynamic & Static Power Reduction in SoC at 130 nm. Search on Bibsonomy DATE The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
18Yunsi Fei, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha Energy Estimation for Extensible Processors. Search on Bibsonomy DATE The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
18Armita Peymandoust, Laura Pozzi, Paolo Ienne, Giovanni De Micheli Automatic Instruction Set Extension and Utilization for Embedded Processors. Search on Bibsonomy ASAP The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
18Li Chen, Srivaths Ravi 0001, Anand Raghunathan, Sujit Dey A scalable software-based self-test methodology for programmable processors. Search on Bibsonomy DAC The full citation details ... 2003 DBLP  DOI  BibTeX  RDF scalability, microprocessor, at-speed test, software-based self-test, test program, manufacturing test
18Hiroshi Tsutsui, Takahiko Masuzaki, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura High speed JPEG2000 encoder by configurable processor. Search on Bibsonomy APCCAS (1) The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
18Gülbin Ezer Xtensa with User Defined DSP Coprocessor Microarchitectures. Search on Bibsonomy ICCD The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
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