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Publication years (Num. hits)
1990-2001 (15) 2002-2004 (32) 2005-2006 (26) 2007 (17) 2008 (15) 2009-2011 (17) 2012-2015 (15) 2016-2021 (15) 2022-2023 (13)
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article(28) inproceedings(136) phdthesis(1)
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Found 165 publication records. Showing 165 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
122Renate Henftling, Andreas Zinn, Matthias Bauer 0003, Martin Zambaldi, Wolfgang Ecker Re-use-centric architecture for a fully accelerated testbench environment. Search on Bibsonomy DAC The full citation details ... 2003 DBLP  DOI  BibTeX  RDF hardware testbench, acceleration, functional verification
111Kelly D. Larson Translation of an existing VMM-based SystemVerilog testbench to OVM. Search on Bibsonomy DAC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF OVM, VMM, testbenches, SystemVerilog
111Young-Il Kim, Chong-Min Kyung Automatic translation of behavioral testbench for fully accelerated simulation. Search on Bibsonomy ICCAD The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
105Aarti Gupta, Albert E. Casavant, Pranav Ashar, Sean Liu, Akira Mukaiyama, Kazutoshi Wakabayashi Property-Specific Testbench Generation for Guided Simulation. Search on Bibsonomy ASP-DAC/VLSI Design The full citation details ... 2002 DBLP  DOI  BibTeX  RDF guided simulation, intelligent testbench generation, witness graph, property-specific testbench, approximate model checking, symbolic model checking, iterative refinement
72Görschwin Fey, Rolf Drechsler Improving simulation-based verification by means of formal methods. Search on Bibsonomy ASP-DAC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
53Ioannis Mavroidis, Ioannis Papaefstathiou Efficient testbench code synthesis for a hardware emulator system. Search on Bibsonomy DATE The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
53Aman Kokrady, Theo J. Powell, S. Ramakrishnan Reducing Design Verification Cycle Time through Testbench Redundancy. Search on Bibsonomy VLSI Design The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
50Stanislaw Deniziak, Krzysztof Sapiecha High Level Testbench Generation for VHDL Models. Search on Bibsonomy ECBS The full citation details ... 1999 DBLP  DOI  BibTeX  RDF simulation, VHDL, testbench
43Young-Il Kim, Woo-Seung Yang, Young-Su Kwon, Chong-Min Kyung Communication-efficient hardware acceleration for fast functional simulation. Search on Bibsonomy DAC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF functional verification, communication overhead, simulation acceleration
43Matthias Bauer 0003, Wolfgang Ecker, Renate Henftling, Andreas Zinn A Method for Accelerating Test Environments. Search on Bibsonomy EUROMICRO The full citation details ... 1999 DBLP  DOI  BibTeX  RDF
41Alistair C. Bruce, M. M. Kamal Hashmi, Andrew Nightingale, Steve Beavis, Nizar Romdhane, Christopher K. Lennard Maintaining consistency between systemC and RTL system designs. Search on Bibsonomy DAC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF SPIRIT, transactor, verification, systemC, RTL, TLM, testbench, VIP
38Mark H. Nodine Automatic Testbench Generation for Rearchitected Designs. Search on Bibsonomy MTV The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
38Edgar Leonardo Romero, Marius Strum, Jiang Chau Wang Comparing two testbench methods for hierarchical functional verification of a bluetooth baseband adaptor. Search on Bibsonomy CODES+ISSS The full citation details ... 2005 DBLP  DOI  BibTeX  RDF verification strategy, optimization, functional verification, coverage analysis, hierarchical verification
38Ho-Seok Choi, Seungbeom Lee, Sin-Chong Park Instruction Based Testbench Architecture, invited. Search on Bibsonomy IWSOC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
38Karina R. G. da Silva, Elmar U. K. Melcher, Guido Araujo, Valdiney Alves Pimenta An automatic testbench generation tool for a SystemC functional verification methodology. Search on Bibsonomy SBCCI The full citation details ... 2004 DBLP  DOI  BibTeX  RDF Brazilip, SCV, VeriSC, tool, SystemC
38Renate Henftling, Andreas Zinn, Matthias Bauer 0003, Wolfgang Ecker, Martin Zambaldi Platform-Based Testbench Generation. Search on Bibsonomy DATE The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
29Carlos Ivan Castro Marquez, Marius Strum, Jiang Chau Wang A PD-based methodology to enhance efficiency in testbenches with random stimulation. Search on Bibsonomy SBCCI The full citation details ... 2009 DBLP  DOI  BibTeX  RDF parameter domains, system-on-chip, design methodologies, functional verification, coverage analysis
29Chia-Chien Weng, Ching-Shang Yang, Shi-Yu Huang RT-level vector selection for realistic peak power simulation. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2007 DBLP  DOI  BibTeX  RDF peak power estimation, vector selection, power modeling
29Francine Bacchini, Daniel D. Gajski, Laurent Maillet-Contoz, Haruhisa Kashiwagi, Jack Donovan, Tommi Mäkeläinen, Jack Greenbaum, Rishiyur S. Nikhil TLM: Crossing Over From Buzz To Adoption. Search on Bibsonomy DAC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
29Alexander Krupp, Wolfgang Müller 0003 Classification trees for random tests and functional coverage. Search on Bibsonomy DATE The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
29Sanggyu Park, Soo-Ik Chae A C/C++-Based Functional Verification Framework Using the SystemC Verification Library. Search on Bibsonomy IEEE International Workshop on Rapid System Prototyping The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
29Sylvain Huet, Emmanuel Casseau, Olivier Pasquier Design Exploration and HW/SW Rapid Prototyping for Real-Time System Design. Search on Bibsonomy IEEE International Workshop on Rapid System Prototyping The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
29Fulvio Corno, Ernesto Sánchez 0001, Matteo Sonza Reorda, Giovanni Squillero Automatic Test Program Generation: A Case Study. Search on Bibsonomy IEEE Des. Test Comput. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
29Mark Litterick, Joachim Geishauser Robust Vera Coding Techniques for Gate-Level and Tester-Compliant SoC Verification Environments. Search on Bibsonomy MTV The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
29Christian Stangier, Ulrich Holtmann Applying Formal Verification with Protocol Compiler. Search on Bibsonomy DSD The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
26Brian Bailey Was it worth the wait? Yes! Search on Bibsonomy IEEE Des. Test Comput. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF verification, formal verification, design reuse, testbench, SystemVerilog
26Indradeep Ghosh, Srivaths Ravi 0001 On automatic generation of RTL validation test benches using circuit testing techniques. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2003 DBLP  DOI  BibTeX  RDF OCCOM, RTL ATPG, RTL testing, path coverage, small validation, toggle coverage, test, testing, generation, ATPG, fault coverage, code coverage, test sets, design validation, coverage metrics, universal test sets, testbench, branch coverage
26Kanna Shimizu, David L. Dill Deriving a simulation input generator and a coverage metric from a formal specification. Search on Bibsonomy DAC The full citation details ... 2002 DBLP  DOI  BibTeX  RDF BDD minimization, input generation, coverage, testbench
24Nikolas J. Wilhelm, Constantin von Deimling, Sami Haddadin, Claudio Glowalla, Rainer Burgkart Validation of a Robotic Testbench for Evaluating Biomechanical Effects of Implant Rotation in Total Knee Arthroplasty on a Cadaveric Specimen. Search on Bibsonomy Sensors The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
24Mohammad Ismael, Ayman Hroub, Abdellatif Abu-Issa AUTG: An Automatic UVM-based TestBench Generator for VLSI Chip Design Verification. Search on Bibsonomy ICM The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
24Hasan Tariq, Mohammed Alsageer, Tamer Khattab, Farid Touati Autonomous SkyCube Testbench using UAV-Assisted Ka-Band OFDM Transceiver. Search on Bibsonomy IWCMC The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
24Rikard Gannedahl, Javad Bagheri Asli, Henrik Sjöland, Atila Alvandpour A Modular System-level Testbench for 6G Beamforming Applications with Near Circuit-Level Fidelity. Search on Bibsonomy NEWCAS The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
24Antonio González-Morgado, Guillermo Heredia, Aníbal Ollero An Open-Source, Low-Cost UAV Testbench for Educational Purposes. Search on Bibsonomy ROBOT (2) The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
24Luke R. Upton, Guénolé Lallement, Michael D. Scott 0002, Joyce Taylor, Robert M. Radway, Dennis Rich, Mark Nelson, Subhasish Mitra, Boris Murmann Testbench on a Chip: A Yield Test Vehicle for Resistive Memory Devices. Search on Bibsonomy ISQED The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
24Abhishek Sanjeev Chandgaonkar, Vaishali Ingale, Vinay Patil, Vanita Agarwal Development Of SV UVM Testbench For Verification Of AMBA AXI3 IP Used For Memory Access Application. Search on Bibsonomy ICCCNT The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
24Shreyash Naresh Chauhan, Ganesh K. Andurkar Development of UVM Testbench for I3C protocol. Search on Bibsonomy ICCCNT The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
24Ruolin Wang, Yuejiao Xu, Jie Peng, Jianmin Ji A²CoST: An ASP-based Avoidable Collision Scenario Testbench for Autonomous Vehicles. Search on Bibsonomy KR The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
24John A. Kalomiros, John V. Vourvoulakis, Stavros Vologiannidis A Testbench for Stereo-Processing Acceleration Based on PYNQ and the StereoPi. Search on Bibsonomy IDAACS The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
24Valentin Baier, Michael Schardt, Maximilian Fink, Martin Jakobi, Alexander W. Koch MEMS-Scanner Testbench for High Field of View LiDAR Applications. Search on Bibsonomy Sensors The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
24Haopeng Chen, Steffen Müller 0002 Analysis of Real-Time LiDAR Sensor Simulation for Testing Automated Driving Functions on a Vehicle-in-the-Loop Testbench. Search on Bibsonomy IV The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
24Jingyao Zhao, Changhao Yan, Zhaori Bi, Fan Yang 0001, Xuan Zeng 0001, Dian Zhou A Novel and Efficient Bayesian Optimization Approach for Analog Designs with Multi-Testbench. Search on Bibsonomy ASP-DAC The full citation details ... 2022 DBLP  DOI  BibTeX  RDF
24Alessio Paolo Buccino, Gaute T. Einevoll MEArec: A Fast and Customizable Testbench Simulator for Ground-truth Extracellular Spiking Activity. Search on Bibsonomy Neuroinformatics The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
24Jorge Jiménez, Antoni Grau, Cristobal Padilla Integration of a Testbench for the Optical and Thermal Characterization of Near-Infrared Detectors Used in Ground and Space-Based Astronomy. Search on Bibsonomy IEEE Trans. Instrum. Meas. The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
24Harsh Bhargav, Vineesh V. S., Binod Kumar 0001, Virendra Singh Enhancing Testbench Quality via Genetic Algorithm. Search on Bibsonomy MWSCAS The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
24Aditya Kulkarni, Ayush Singh, Sachin Arun Waje, Sunil Shrirangrao Kashide, Seonil Brian Choi TestQuBE: A Testbench Enhancement Methodology for Universal Serial Interfaces in Complex SoCs. Search on Bibsonomy SoCC The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
24Selim Solmaz, Franz R. Holzinger A Novel Testbench for Development, Calibration and Functional Testing of ADAS/AD Functions. Search on Bibsonomy ICCVE The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
24Youngnam Han 5G K-Simulator and TestBench Demonstration Proposal. Search on Bibsonomy CCNC The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
24Vineeth B, B. Bala Tripura Sundari UVM Based Testbench Architecture for Coverage Driven Functional Verification of SPI Protocol. Search on Bibsonomy ICACCI The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
24Jigar Savla Getting Started on Co-Emulation: Transition your Design and Testbench to an Emulator. Search on Bibsonomy MTV The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
24Slimane Boutobza, Sorin Popa, Andrea Costa An Automatic Testbench Generator for Test Patterns Validation. Search on Bibsonomy EWDTS The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
24Muhammad Hassan 0002, Daniel Große, Hoang M. Le, Thilo Vörtler, Karsten Einwich, Rolf Drechsler Testbench qualification for SystemC-AMS timed data flow models. Search on Bibsonomy DATE The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
24Khaled Salah 0001, Hassan Mostafa Constructing Effective UVM Testbench for DRAM Memory Controllers. Search on Bibsonomy NGCAS The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
24Nicole Fern, Kwang-Ting Cheng Mining mutation testing simulation traces for security and testbench debugging. Search on Bibsonomy ICCAD The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
24Neeraj Bokde, Kishore Kulat R package imputeTestbench as a Testbench to compare missing value imputation methods. Search on Bibsonomy CoRR The full citation details ... 2016 DBLP  BibTeX  RDF
24Ahmed El-Naggar, Essraa Massoud, Ahmed Medhat, Hala Ibrahim, Bassma Al-Abassy, Sameh El-Ashry, Mostafa Khamis, Ahmed Shalaby 0001 A narrative of UVM testbench environment for interconnection routers: A practical approach. Search on Bibsonomy IDT The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
24Ralph Weissnegger, Markus Pistauer, Christian Kreiner, Markus Schuß, Kay Römer, Christian Steger Automatic Testbench Generation for Simulation-based Verification of Safety-critical Systems in UML. Search on Bibsonomy PECCS The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
24Kai Huang 0002, Peng Zhu, Rongjie Yan, Xiaolang Yan Functional Testbench Qualification by Mutation Analysis. Search on Bibsonomy VLSI Design The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
24Eman El Mandouh, Amr G. Wassal Guiding intelligent testbench automation using data mining and formal methods. Search on Bibsonomy IDT The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
24Mohamed Abdelsalam, Ashraf Salem SoC verification platforms using HW emulation and co-modeling Testbench technologies. Search on Bibsonomy IDT The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
24Graziella Scandurra, Gianluca Cannatà, Gino Giusi, Carmine Ciofi A simple and effective testbench for quartz tuning fork characterization and sensing applications. Search on Bibsonomy I2MTC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
24Dong Gwan Lee, Kil Seok Cho, Jin Hwa Shin A simple prediction method of ballistic missile trajectory to designate search direction and its verification using a testbench. Search on Bibsonomy ASCC The full citation details ... 2015 DBLP  DOI  BibTeX  RDF
24Nicola Bombieri, Franco Fummi, Valerio Guarnieri, Graziano Pravadelli Testbench Qualification of SystemC TLM Protocols through Mutation Analysis. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
24Somnath Banerjee 0003, Tushar Gupta Optimized Simulation Acceleration with Partial Testbench Evaluation. Search on Bibsonomy MTV The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
24Lucas Cicero, Camel Tanougast, Harry Ramenah, Loïc Siéler, F. Lecerf A Li-Ion cell testbench for fast characterization and modeling. Search on Bibsonomy CoDIT The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
24Mehdi Dehbashi, André Sülflow, Görschwin Fey Automated design debugging in a testbench-based verification environment. Search on Bibsonomy Microprocess. Microsystems The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
24Geng Zhong, Jian Zhou, Bei Xia Parameter and UVM, making a layered testbench powerful. Search on Bibsonomy ASICON The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
24Matteo Morelli, Federico Moro, Tizar Rizano, Daniele Fontanelli, Luigi Palopoli 0002, Marco Di Natale A robotic vehicle testbench for the application of MBD-MDE development technologies. Search on Bibsonomy ETFA The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
24Saif Uddin, Johnny Öberg Testing of an off-chip NoC protocol using a BIST/Synthesizable Testbench approach. Search on Bibsonomy NORCHIP The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
24Giuseppe Di Guglielmo, Graziano Pravadelli A testbench specification language for SystemC verification. Search on Bibsonomy CODES+ISSS The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
24Zhaohui Hu, Arnaud Pierres, Shiqing Hu, Chen Fang, Philippe Royannez, Eng Pek See, Yean Ling Hoon Practical and efficient SOC verification flow by reusing IP testcase and testbench. Search on Bibsonomy ISOCC The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
24Namdo Kim, Young-Nam Yun, Young-Rae Cho, Jay B. Kim, Byeong Min How to automate millions lines of top-level UVM testbench and handle huge register classes. Search on Bibsonomy ISOCC The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
24Takushi Hashida, Yuuki Araga, Makoto Nagata A Diagnosis Testbench of Analog IP Cores for Characterization of Substrate Coupling Strength. Search on Bibsonomy IEICE Trans. Electron. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
24Chin-Lung Chuang, Chien-Nan Jimmy Liu Hybrid Testbench Acceleration for Reducing Communication Overhead. Search on Bibsonomy IEEE Des. Test Comput. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
24James O. Owuor, Josiah L. Munda, Adisa A. Jimoh The ieee 34 node radial test feeder as a simulation testbench for Distributed Generation. Search on Bibsonomy AFRICON The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
24Mehdi Dehbashi, André Sülflow, Görschwin Fey Automated Design Debugging in a Testbench-Based Verification Environment. Search on Bibsonomy DSD The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
24Mario Westmeier, Benjamin Herwig, Josef Börcsök Enhancing a simulation environment for computer architecture to a SystemC based testbench tool for design verification. Search on Bibsonomy ICAT The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
24Peter Lisherness, Kwang-Ting (Tim) Cheng Coverage discounting: A generalized approach for testbench qualification. Search on Bibsonomy HLDVT The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
24Haocheng Huang, Aiwu Ruan, Yongbo Liao, Jianhua Zhu, Lin Wang, Chuanyin Xiang, Ping Li 0024 A new event driven testbench synthesis engine for FPGA emulation. Search on Bibsonomy ASICON The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
24Takushi Hashida, Yuuki Araga, Makoto Nagata A diagnosis testbench of analog IP cores against on-chip environmental disturbances. Search on Bibsonomy VTS The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
24Mile K. Stojcev Navabi Zainalabedin, Verilog Digital System Design: Register Transfer Level Synthesis, Testbench, & Verification (second ed.), McGraw Hill, New York (2006) ISBN 0-07-144564-1 Hardcover, pp 384, plus XVI. Search on Bibsonomy Microelectron. Reliab. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
24Joseph W. Lyles Jr. Vertical Reuse Strategy for Testbench Components Supporting Memory Consistency Checking of an SMP-Capable AMD64 Processor. Search on Bibsonomy MTV The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
24Kana Murale, Scot Hildebrandt, Per Bojsen, Alfonso Urzua AMD64 Processor Front-End Verification (at Unit-Level Testbench) with Instruction Set Simulator. Search on Bibsonomy MTV The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
24Shireesh Verma, Srinath Atluri, Valeria Bertacco, Mark Glasser, Badri Gopalan, Sharon Rosenberg Panel: Software practices for verification/testbench management. Search on Bibsonomy HLDVT The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
24Iakovos Mavroidis, Ioannis Papaefstathiou Accelerating hardware simulation: Testbench code emulation. Search on Bibsonomy FPT The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
24Michel Pignol, Thierry Parrain, Vincent Claverie, Christian Boléat, Guy Estaves Development of a Testbench for Validation of DMT and DT2 Fault-Tolerant Architectures on SOI PowerPC7448. Search on Bibsonomy IOLTS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
24Martin Zambaldi Concepts for the development of a generic multi-level testbench covering different areas of application. Search on Bibsonomy 2008   RDF
24Martin Horn, Josef Zehetner A Brake-Testbench for Research and Education. Search on Bibsonomy CCA The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
24Stephan Kubisch, Harald Widiger, Ronald Hecht, Dirk Timmermann, Martin Siemroth Architektur einer flexiblen, wiederverwendbaren Testbench zur Verifikation paketverarbeitender Hardware in SystemC. Search on Bibsonomy MBMV The full citation details ... 2007 DBLP  BibTeX  RDF
24Daniel Große, Hernan Peraza, Wolfgang Klingauf, Rolf Drechsler Measuring the Quality of a SystemC Testbench by using Code Coverage Techniques. Search on Bibsonomy FDL The full citation details ... 2007 DBLP  BibTeX  RDF
24Staffan Berg Algorithmic Test Generation - a New Approach to testbench Creation. Search on Bibsonomy FDL The full citation details ... 2007 DBLP  BibTeX  RDF
24Takahito Nakajima, Shigeru Namiki, Shuhei Kinoshita, Naohiko Shimizu A Portable Co-Verification System Which Generates Testbench Automatically. Search on Bibsonomy FPT The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
24Dierk Engelhardt, Tilo Linz TestBench meets TestFrame: State of the Art Testdesign. Search on Bibsonomy Softwaretechnik-Trends The full citation details ... 2006 DBLP  BibTeX  RDF
24Anton Schlatter TestFrame meets TestBench: State of the Art Testautomatisierung. Search on Bibsonomy Softwaretechnik-Trends The full citation details ... 2006 DBLP  BibTeX  RDF
24Jungbo Son, Hae-Wook Choi, Sin-Chong Park Accelerating Verification with Reusable Testbench. Search on Bibsonomy IEICE Trans. Inf. Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
24Ho-Seok Choi, Hae-Wook Choi, Sin-Chong Park Instruction Based Synthesizable Testbench Architecture. Search on Bibsonomy IEICE Trans. Electron. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
24Janusz Sosnowski, Piotr Gawkowski, Przemyslaw Zygulski, Andrzej Tymoczko Enhancing Fault Injection Testbench. Search on Bibsonomy DepCoS-RELCOMEX The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
24Anshul Singh, Scott C. Smith Using a VHDL Testbench for Transistor-Level Simulation and Energy Calculation. Search on Bibsonomy CDES The full citation details ... 2005 DBLP  BibTeX  RDF
24Young-Il Kim, Chong-Min Kyung TPartition: Testbench Partitioning for Hardware-Accelerated Functional Verification. Search on Bibsonomy IEEE Des. Test Comput. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
24David Hunter Some lessons learned on constructing an automated testbench for evolvable hardware experiments. Search on Bibsonomy IEEE Congress on Evolutionary Computation The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
24Cordula Hansen, Wolfgang Rosenstiel High Level Testbench Transformation for Pipelined Components. Search on Bibsonomy MBMV The full citation details ... 2002 DBLP  BibTeX  RDF
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