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Publication years (Num. hits)
2003-2005 (28) 2006 (21) 2007 (22) 2008 (17) 2009-2010 (17) 2011-2018 (12)
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article(19) incollection(1) inproceedings(94) phdthesis(3)
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Found 117 publication records. Showing 117 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
56Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdhane Extending the transaction level modeling approach for fast communication architecture exploration. Search on Bibsonomy DAC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF bus cycle accurate modeling, communication architecture exploration, shared bus architectures, transaction level modeling, AMBA
49Ney Laert Vilar Calazans, Edson I. Moreno, Fabiano Hessel, Vitor M. da Rosa, Fernando Moraes 0001, Everton Carara From VHDL Register Transfer Level to SystemC Transaction Level Modeling: A Comparative Case Study. Search on Bibsonomy SBCCI The full citation details ... 2003 DBLP  DOI  BibTeX  RDF transaction level, VHDL, SystemC, System modeling, register transfer level
47Gunar Schirner, Rainer Dömer Quantitative analysis of the speed/accuracy trade-off in transaction level modeling. Search on Bibsonomy ACM Trans. Embed. Comput. Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF system-on-chip, System level design, transaction level modeling
46Di Wang, Vyas Venkataraman, Zhen Wang 0001, Wei Qin, Hangsheng Wang, Mrinal Bose, Jayanta Bhadra Accelerating multi-party scheduling for transaction-level modeling. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2009 DBLP  DOI  BibTeX  RDF concurrent programming., multiparty rendezvous, scheduling, transaction level modeling
45Tayeb Bouhadiba, Florence Maraninchi, Giovanni Funchal Formal and executable contracts for transaction-level modeling in SystemC. Search on Bibsonomy EMSOFT The full citation details ... 2009 DBLP  DOI  BibTeX  RDF formal component models, systems-on-a-chip, virtual prototyping, transaction-level-modeling
42Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdhane Fast exploration of bus-based communication architectures at the CCATB abstraction. Search on Bibsonomy ACM Trans. Embed. Comput. Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF performance exploration, System-on-chip, transaction-level modeling, communication architecture, on-chip bus
40Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdhane Fast exploration of bus-based on-chip communication architectures. Search on Bibsonomy CODES+ISSS The full citation details ... 2004 DBLP  DOI  BibTeX  RDF bus cycle accurate modeling, fast communication architecture exploration, shared bus architectures, transaction level modeling, AMBA
37Jeff Hiner, Ashish Shenoy, Roman L. Lysecky, Susan Lysecky, Ann Gordon-Ross Transaction-Level Modeling for Sensor Networks Using SystemC. Search on Bibsonomy SUTC/UMC The full citation details ... 2010 DBLP  DOI  BibTeX  RDF SystemC profiling, simulation, Sensor networks, transaction-level modeling
37Abhijit K. Deb, Axel Jantsch, Johnny Öberg System design for DSP applications in transaction level modeling paradigm. Search on Bibsonomy DAC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF system design, DSP, grammar, transaction level modeling
36Lilian Janin, Doug Edwards CSP Transactors for Asynchronous Transaction Level Modeling and IP Reuse. Search on Bibsonomy ICCSA (3) The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
36Young-Taek Kim, Taehun Kim, Youngduk Kim, Chulho Shin, Eui-Young Chung, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo Fast and Accurate Transaction Level Modeling of an Extended AMBA2.0 Bus Architecture. Search on Bibsonomy DATE The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
35Anh-Vu Dinh-Duc, Pascal Vivet, Alain Clouard A Transaction Level Modeling of Network-on-Chip Architecture for Energy Estimation. Search on Bibsonomy RIVF The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
34Rabie Ben Atitallah, Smaïl Niar, Samy Meftali, Jean-Luc Dekeyser An MPSoC Performance Estimation Framework Using Transaction Level Modeling. Search on Bibsonomy RTCSA The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
33Lukai Cai, Daniel Gajski Transaction level modeling: an overview. Search on Bibsonomy CODES+ISSS The full citation details ... 2003 DBLP  DOI  BibTeX  RDF modeling, validation, refinement, synthesis, exploration, transaction level model
31A. Bernstein, M. Burton, Frank Ghenassia How to bridge the abstraction gap in system level modeling and design. Search on Bibsonomy ICCAD The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
31Imed Moussa, Thierry Grellier, Giang Nguyen Exploring SW Performance Using SoC Transaction-Level Modeling. Search on Bibsonomy DATE The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
30Wolfgang Klingauf Systematic Transaction Level Modeling of Embedded Systems with SystemC. Search on Bibsonomy DATE The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
29Jin Lee, Sin-Chong Park Transaction level modeling of IEEE 802.11 system. Search on Bibsonomy ISCAS (4) The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
28Grant Martin The First Transaction, but not the Last. Search on Bibsonomy IEEE Des. Test Comput. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF SystemC, transaction-level modeling, ESL, TLM
28Nicola Bombieri, Franco Fummi, Davide Quaglia TLM/network design space exploration for networked embedded systems. Search on Bibsonomy CODES+ISSS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF transaction-level modeling, networked embedded systems
28Maman Abdurohman, Kuspriyanto, Sarwono Sutikno, Arif Sasongko Transaction Level Modeling for Early Verification on Embedded System Design. Search on Bibsonomy ACIS-ICIS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
26Bastian Haetzer, Martin Radetzki Systemc transaction level modeling with transaction events. Search on Bibsonomy FDL The full citation details ... 2013 DBLP  BibTeX  RDF
26Giovanni Beltrame, Donatella Sciuto, Cristina Silvano Multi-Accuracy Power and Performance Transaction-Level Modeling. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
25Nicola Bombieri, Andrea Fedeli, Franco Fummi On PSL Properties Re-use in SoC Design Flow Based on Transaction Level Modeling. Search on Bibsonomy MTV The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
24Lin Chen, Wanzhong Sun, Zhixin Wang, Chao Zhou A SystemC-Based Transaction Level Modeling of On-Chip-Bus. Search on Bibsonomy CSSE (4) The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
24Alena Tsikhanovich, Frédéric Rousseau 0001, El Mostapha Aboulhamid, Guy Bois Transaction Level Modeling in Hardware/Software System Design using .Net Framework. Search on Bibsonomy CCECE The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
24Heinz-Josef Schlebusch, Gary Smith 0001, Donatella Sciuto, Daniel Gajski, Carsten Mielenz, Christopher K. Lennard, Frank Ghenassia, Stuart Swan, Joachim Kunkel Transaction Based Design: Another Buzzword or the Solution to a Design Problem? Search on Bibsonomy DATE The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
23Marco Caldari, Massimo Conti, Massimo Coppola, Stephane Curaba, Lorenzo Pieralisi, Claudio Turchetti Transaction-Level Models for AMBA Bus Architecture Using SystemC 2.0. Search on Bibsonomy DATE The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
21Chen Kang Lo, Ren-Song Tsay Automatic generation of Cycle Accurate and Cycle Count Accurate transaction level bus models from a formal model. Search on Bibsonomy ASP-DAC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
21Katalin Popovici, Xavier Guerin, Frédéric Rousseau 0001, Pier Stanislao Paolucci, Ahmed Amine Jerraya Platform-based software design flow for heterogeneous MPSoC. Search on Bibsonomy ACM Trans. Embed. Comput. Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF multimedia, programming environment, software design, SystemC, Simulink, transaction level modeling, Multiprocessor system-on chip
21Reinaldo A. Bergamaschi, Indira Nair, Gero Dittmann, Hiren D. Patel, Geert Janssen, Nagu R. Dhanwada, Alper Buyuktosunoglu, Emrah Acar, Gi-Joon Nam, Dorothy Kucar, Pradip Bose, John A. Darringer, Guoling Han Performance modeling for early analysis of multi-core systems. Search on Bibsonomy CODES+ISSS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF early analysis, multi-core systems modeling, physical analysis, performance, power analysis, transaction-level modeling
21Tse-Chen Yeh, Tsung-Yu Ho, Hung-Yu Chen, Ing-Jer Huang SystemC-Based Design Space Exploration of a 3D Graphics Acceleration SoC for Consumer Electronics. Search on Bibsonomy EUC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF SystemC modeling, 3D graphics SoC, design space exploration, transaction-level modeling
21Fabiano Hessel, Vitor M. da Rosa, Carlos Eduardo Reif, César A. M. Marcon, Tatiana Gadelha Serra dos Santos Scheduling refinement in abstract RTOS models. Search on Bibsonomy ACM Trans. Embed. Comput. Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF RTOS scheduling, Real-time operating systems, transaction level Modeling
21Jae-Gon Lee, Woo-Seung Yang, Young-Su Kwon, Young-Il Kim, Chong-Min Kyung Simulation acceleration of transaction-level models for SoC with RTL sub-blocks. Search on Bibsonomy ASP-DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF SoC, systemc, transaction-level modeling, TLM, simulation acceleration
21Dongwan Shin, Andreas Gerstlauer, Junyu Peng, Rainer Dömer, Daniel D. Gajski Automatic generation of transaction level models for rapid design space exploration. Search on Bibsonomy CODES+ISSS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF transaction-level model, communication synthesis
21Jens Gladigau Combining formal model-based system-level design with SystemC transaction level modeling. Search on Bibsonomy 2012   RDF
21Jin Lee, Sin-Chong Park Methodology of High-Level Transaction Level Modeling Using 802.11 PHY Example. Search on Bibsonomy IEICE Trans. Inf. Syst. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
20Sudeep Pasricha, Mohamed Ben-Romdhane Using TLM for Exploring Bus-based SoC Communication Architectures. Search on Bibsonomy ASAP The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
20Bernhard Niemann, Christian Haubelt Towards a Unified Execution Model for Transactions in TLM. Search on Bibsonomy MEMOCODE The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
20Frederic Doucet, R. K. Shyamasundar, Ingolf H. Krüger, Saurabh Joshi 0001, Rajesh K. Gupta 0001 Reactivity in SystemC Transaction-Level Models. Search on Bibsonomy Haifa Verification Conference The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
19Mohammad Reza Kakoee, Mohammad Hossein Neishaburi, Siamak Mohammadi Functional Test-Case Generation by a Control Transaction Graph for TLM Verification. Search on Bibsonomy DSD The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
19Gunar Schirner, Rainer Dömer Result-Oriented Modeling - A Novel Technique for Fast and Accurate TLM. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
18Nicola Bombieri, Franco Fummi, Graziano Pravadelli A methodology for abstracting RTL designs into TL descriptions. Search on Bibsonomy MEMOCODE The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
17Francine Bacchini, Daniel D. Gajski, Laurent Maillet-Contoz, Haruhisa Kashiwagi, Jack Donovan, Tommi Mäkeläinen, Jack Greenbaum, Rishiyur S. Nikhil TLM: Crossing Over From Buzz To Adoption. Search on Bibsonomy DAC The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
17Amr Baher, Ahmed N. El-Zeiny, Ahmed Aly, Ahmed H. Khalil, Adham Hassan, AbdelRahman Saeed, Karim Abo El Makarem, Magdy A. El-Moursy, Hassan Mostafa Dynamic power estimation using Transaction Level Modeling. Search on Bibsonomy Microelectron. J. The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
17Takieddine Majdoub, Sébastien Le Nours, Olivier Pasquier, Fabienne Nouvel Performance evaluation of an automotive distributed architecture based on a high speed power line communication protocol using a transaction level modeling approach. Search on Bibsonomy J. Real Time Image Process. The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
17Rainer Findenig, Thomas Leitner, Wolfgang Ecker Transaction-Level Modeling and Refinement Using State Charts. Search on Bibsonomy EUROCAST (1) The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
17Rauf Salimi Khaligh Transaction level modeling and high performance simulation of embedded systems. Search on Bibsonomy 2013   RDF
17Takieddine Majdoub, Sébastien Le Nours, Olivier Pasquier, Fabienne Nouvel Transaction Level Modeling of a Networked Embedded System Based on a Power Line Communication Protocol. Search on Bibsonomy DSD The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
17Alexander W. Rath, Volkan Esen, Wolfgang Ecker Analog transaction level modeling. Search on Bibsonomy HLDVT The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
17Bastian Haetzer, Martin Radetzki A case study on message-based discrete event simulation for Transaction Level Modeling. Search on Bibsonomy FDL The full citation details ... 2011 DBLP  BibTeX  RDF
17Rauf Salimi Khaligh, Martin Radetzki A metamodel and semantics for transaction level modeling. Search on Bibsonomy FDL The full citation details ... 2011 DBLP  BibTeX  RDF
17Takieddine Majdoub, Sébastien Le Nours, Olivier Pasquier, Fabienne Nouvel Performance evaluation of an automotive distributed architecture based on HPAV communication protocol using a transaction level modeling approach. Search on Bibsonomy DASIP The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
17François Duhem, Fabrice Muller, Philippe Lorenzini Methodology for designing partially reconfigurable systems using transaction-level modeling. Search on Bibsonomy DASIP The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
17Yonghyun Hwang, Gunar Schirner, Samar Abdi, Daniel D. Gajski Accurate timed RTOS model for transaction level modeling. Search on Bibsonomy DATE The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
17Markus Damm, Javier Moreno 0003, Jan Haase 0001, Christoph Grimm 0001 Using Transaction Level Modeling techniques for wireless sensor network simulation. Search on Bibsonomy DATE The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
17Guido Stehr, Josef Eckmuuller Transaction level modeling in practice: Motivation and introduction. Search on Bibsonomy ICCAD The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
17Anthony Barreteau Techniques de modélisation transactionnelle pour le dimensionnement des futurs systèmes de radiocommunication mobiles. (Transaction-level modeling techniques for radio communication systems architecting). Search on Bibsonomy 2010   RDF
17Chin-Yao Chang, Chih-Yuan Hsiao, Kuen-Jong Lee, Alan P. Su Transaction Level Modeling and Design Space Exploration for SOC Test Architectures. Search on Bibsonomy Asian Test Symposium The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
17Amal Banerjee, Andreas Gerstlauer Transaction Level Modeling of Best-Effort Channels for Networked Embedded Devices. Search on Bibsonomy IESS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
17Anthony Barreteau, Sébastien Le Nours, Olivier Pasquier, Jean Paul Calvez Transaction level modeling of an adaptive multi-standard and multi-application radio communication system. Search on Bibsonomy FDL The full citation details ... 2009 DBLP  BibTeX  RDF
17M. Cheikhwafa, Sébastien Le Nours, Olivier Pasquier, Jean Paul Calvez Transaction level modeling of a FlexRay communication network. Search on Bibsonomy FDL The full citation details ... 2009 DBLP  BibTeX  RDF
17Sami Boukhechem, El-Bay Bourennane SystemC Transaction-Level Modeling of an MPSoC Platform Based on an Open Source ISS by Using Interprocess Communication. Search on Bibsonomy Int. J. Reconfigurable Comput. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
17Alessandro Mignogna, Massimo Conti, M. D'Angelo, Massimo Baleani, Alberto Ferrari Transaction Level Modeling and Performance Analysis in SystemC of IEEE 802.15.4 Wireless Standard. Search on Bibsonomy DSD The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
17Chih-Hung Li, Wen-Hsiao Peng, Tihao Chiang Design space exploration of an H.264/AVC-based video embedding transcoder using transaction level modeling. Search on Bibsonomy ICME The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
17Thomas Lenart, Henrik Svensson, Viktor Öwall A Hybrid Interconnect Network-on-Chip and a Transaction Level Modeling Approach for Reconfigurable Computing. Search on Bibsonomy DELTA The full citation details ... 2008 DBLP  DOI  BibTeX  RDF SCENIC, Network-on-Chip, Reconfigurable Computing, TLM, 2D Mesh
17Wolfgang Klingauf Systematic Transaction Level Modeling of Embedded Systems with SystemC Search on Bibsonomy CoRR The full citation details ... 2007 DBLP  BibTeX  RDF
17Young-Taek Kim, Taehun Kim, Youngduk Kim, Chulho Shin, Eui-Young Chung, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo Fast and Accurate Transaction Level Modeling of an Extended AMBA2.0 Bus Architecture Search on Bibsonomy CoRR The full citation details ... 2007 DBLP  BibTeX  RDF
17Rauf Salimi Khaligh, Martin Radetzki Efficient and Extensible Transaction Level Modeling Based on an Object Oriented Model of Bus Transactions. Search on Bibsonomy IESS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
17Mathieu Dubois, El Mostapha Aboulhamid, Frédéric Rousseau 0001 Acceleration for a compiled Transaction Level Modeling simulation. Search on Bibsonomy ICECS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
17Wolfgang Ecker, Volkan Esen, Thomas Steininger, Michael Velten Case Study on Transaction Level Modeling. Search on Bibsonomy FDL The full citation details ... 2006 DBLP  BibTeX  RDF
17Vesa Lahtinen, Jouni Siirtola, Tommi Mäkeläinen Transaction Level Modeling in Communication Engine Design. Search on Bibsonomy FDL The full citation details ... 2006 DBLP  BibTeX  RDF
17Liang Liang, Bo Zhou, Xuegong Zhou, Chenglian Peng System Prototyping Based on SystemC Transaction-Level Modeling. Search on Bibsonomy IMSCCS (2) The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
17Nagu R. Dhanwada, Reinaldo A. Bergamaschi, William W. Dungan, Indira Nair, Paul Gramann, William E. Dougherty, Ing-Chao Lin Transaction-level modeling for architectural and power analysis of PowerPC and CoreConnect-based systems. Search on Bibsonomy Des. Autom. Embed. Syst. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
17Nicola Bombieri, Andrea Fedeli, Franco Fummi Extended abstract: on the property-based verification in SoC design flow founded on transaction level modeling. Search on Bibsonomy MEMOCODE The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
17Wolfgang Klingauf, Robert Günzel From TLM to FPGA: Rapid Prototyping with SystemC and Transaction Level Modeling. Search on Bibsonomy FPT The full citation details ... 2005 DBLP  BibTeX  RDF
17Sherif G. Aly 0001 Transaction Level Modeling of Network Protocols Using Java. Search on Bibsonomy MSV/AMCS The full citation details ... 2004 DBLP  BibTeX  RDF
17Adam Donlin Transaction level modeling: flows and use models. Search on Bibsonomy CODES+ISSS The full citation details ... 2004 DBLP  DOI  BibTeX  RDF design abstractions, use models, design flows, TLM
17Sherif G. Aly 0001, Ashraf M. Salem Transaction Level Modeling in Java. Search on Bibsonomy FDL The full citation details ... 2004 DBLP  BibTeX  RDF
17Imed Moussa, Thierry Grellier, Giang Nguyen Exploring SW Performance Using SoC Transaction-Level Modeling. Search on Bibsonomy Embedded Software for SoC The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
16Ali Habibi, Sofiène Tahar Design and verification of SystemC transaction-level models. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
14Miron Abramovici, Kees Goossens, Bart Vermeulen, Jack Greenbaum, Neal Stollon, Adam Donlin You can catch more bugs with transaction level honey. Search on Bibsonomy CODES+ISSS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF system diagnostics, transaction-level models
14Nicola Bombieri, Franco Fummi, Graziano Pravadelli On the evaluation of transactor-based verification for reusing TLM assertions and testbenches at RTL. Search on Bibsonomy DATE The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
14Tim Kogel, Matthew Braun Virtual prototyping of embedded platforms for wireless and multimedia. Search on Bibsonomy DATE The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
14Gunar Schirner, Rainer Dömer Accurate yet fast modeling of real-time communication. Search on Bibsonomy CODES+ISSS The full citation details ... 2006 DBLP  DOI  BibTeX  RDF result oriented modeling, system level design, real-time communication, CAN, controller area network, transaction level model, TLM, ROM
13Nicola Bombieri, Franco Fummi, Graziano Pravadelli, Andrea Fedeli Hybrid, Incremental Assertion-Based Verification for TLM Design Flows. Search on Bibsonomy IEEE Des. Test Comput. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF hybrid, RTL, design flow, TLM, assertion-based verification
13Nicola Bombieri, Franco Fummi, Graziano Pravadelli Incremental ABV for functional validation of TL-to-RTL design refinement. Search on Bibsonomy DATE The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
13Mohammad Reza Kakoee, Hamid Shojaei, Hassan Ghasemzadeh 0001, Marjan Sirjani, Zainalabedin Navabi A New Approach for Design and Verification of Transaction Level Models. Search on Bibsonomy ISCAS The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
13Ali Habibi, Sofiène Tahar, Amer Samarah, Donglin Li, Otmane Aït Mohamed Efficient assertion based verification using TLM. Search on Bibsonomy DATE The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
13Ali Habibi, Sofiène Tahar Design for Verification of SystemC Transaction Level Models. Search on Bibsonomy DATE The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
13Jin Lee, Sin-Chong Park Orthogonalized Communication Architecture for MP-SoC with Global Bus. Search on Bibsonomy IWSOC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
13Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa A Modular Approach to Model Heterogeneous MPSoC at Cycle Level. Search on Bibsonomy DSD The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
13Cedric Walravens, Yves Vanderperren, Wim Dehaene ActivaSC: a highly efficient and non-intrusive extension for activity-based analysis of SystemC models. Search on Bibsonomy DAC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF system C, power modeling, activity monitoring
13Gunar Schirner, Rainer Dömer Fast and accurate transaction level models using result oriented modeling. Search on Bibsonomy ICCAD The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
12Nicola Bombieri, Franco Fummi, Graziano Pravadelli Reuse and optimization of testbenches and properties in a TLM-to-RTL design flow. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF TBV, Model checking, fault models, functional verification, TLM
12Jae W. Lee, Myron King, Krste Asanovic Continual hashing for efficient fine-grain state inconsistency detection. Search on Bibsonomy ICCD The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
11Nicola Bombieri, Franco Fummi, Graziano Pravadelli A Mutation Model for the SystemC TLM 2.0 Communication Interfaces. Search on Bibsonomy DATE The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
11Olivier Ponsini, Wendelin Serwe A Schedulerless Semantics of TLM Models Written in SystemC Via Translation into LOTOS. Search on Bibsonomy FM The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
11Gunar Schirner, Rainer Dömer Quantitative analysis of transaction level models for the AMBA bus. Search on Bibsonomy DATE The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
11Yung-Yuan Chen, Chung-Hsien Hsu, Kuen-Long Leu SoC-level risk assessment using FMEA approach in system design with SystemC. Search on Bibsonomy SIES The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
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