|
|
Venues (Conferences, Journals, ...)
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 11 occurrences of 7 keywords
|
|
|
Results
Found 5 publication records. Showing 5 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
70 | Jeffrey Stuecheli, Dimitris Kaseridis, David Daly, Hillery C. Hunter, Lizy K. John |
The virtual write queue: coordinating DRAM and last-level cache policies. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
cmp many-core, ddr ddr2 ddr3, dram-parameters, memory-scheduling writeback, page-mode, write-queue, write-scheduling, dram, cache-replacement, last-level-cache |
24 | Nam Sung Kim, Trevor N. Mudge |
Reducing register ports using delayed write-back queues and operand pre-fetch. |
ICS |
2003 |
DBLP DOI BibTeX RDF |
write queue, low power, instruction level parallelism, register file, out-of-order processor |
24 | Nam Sung Kim, Trevor N. Mudge |
The microarchitecture of a low power register file. |
ISLPED |
2003 |
DBLP DOI BibTeX RDF |
write queue, low power, instruction level parallelism, register file, out-of-order processor |
21 | Jeffrey Stuecheli, Dimitris Kaseridis, David Daly, Hillery C. Hunter, Lizy K. John |
Coordinating DRAM and Last-Level-Cache Policies with the Virtual Write Queue. |
IEEE Micro |
2011 |
DBLP DOI BibTeX RDF |
|
15 | Jun Shao, Brian T. Davis |
A Burst Scheduling Access Reordering Mechanism. |
HPCA |
2007 |
DBLP DOI BibTeX RDF |
|
Displaying result #1 - #5 of 5 (100 per page; Change: )
|
|