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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 7 occurrences of 7 keywords
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Results
Found 6 publication records. Showing 6 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
27 | Chun-Hao Lai, Shun-Chih Yu, Chia-Lin Yang, Hsiang-Pang Li |
Fine-grained write scheduling for PCM performance improvement under write power budget. |
ISLPED |
2015 |
DBLP DOI BibTeX RDF |
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19 | Jeffrey Stuecheli, Dimitris Kaseridis, David Daly, Hillery C. Hunter, Lizy K. John |
The virtual write queue: coordinating DRAM and last-level cache policies. |
ISCA |
2010 |
DBLP DOI BibTeX RDF |
cmp many-core, ddr ddr2 ddr3, dram-parameters, memory-scheduling writeback, page-mode, write-queue, write-scheduling, dram, cache-replacement, last-level-cache |
16 | Bowen Huang, Jianwei Liao 0001, Jun Li 0062, Yang Chen, Zhigang Cai, Yuanquan Shi |
Read disturb-aware write scheduling and data reallocation in SSDs. |
IEICE Electron. Express |
2020 |
DBLP DOI BibTeX RDF |
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16 | Jun Li 0062, Xiaofei Xu, Xiaoning Peng, Jianwei Liao 0001 |
Pattern-based Write Scheduling and Read Balance-oriented Wear-Leveling for Solid State Drivers. |
MSST |
2019 |
DBLP DOI BibTeX RDF |
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16 | Ying Wang 0001, Yinhe Han 0001, Huawei Li 0001, Lei Zhang 0008, Yuanqing Cheng, Xiaowei Li 0001 |
PSI Conscious Write Scheduling: Architectural Support for Reliable Power Delivery in 3-D Die-Stacked PCM. |
IEEE Trans. Very Large Scale Integr. Syst. |
2016 |
DBLP DOI BibTeX RDF |
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12 | Chitra Natarajan, Bruce Christenson, Faye A. Briggs |
A study of performance impact of memory controller features in multi-processor server environment. |
WMPI |
2004 |
DBLP DOI BibTeX RDF |
memory transaction scheduling, server systems, multi-processors, memory controller, memory subsystem, performance impact |
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