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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 321 occurrences of 243 keywords
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Results
Found 625 publication records. Showing 625 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
139 | Matt T. Yourst |
PTLsim: A Cycle Accurate Full System x86-64 Microarchitectural Simulator. |
ISPASS |
2007 |
DBLP DOI BibTeX RDF |
client-server networked benchmark, PTLsim, cycle accurate full system, x86-64 microarchitectural simulator, superscalar x86-64 processor core, full-speed native execution, microarchitectural simulators, x86 ISA, microoperation level, multiprocessor capable simulation, Xen hypervisor, AMD Athlon 64 machine, virtual machine |
80 | Scott Owens, Susmit Sarkar, Peter Sewell |
A Better x86 Memory Model: x86-TSO. |
TPHOLs |
2009 |
DBLP DOI BibTeX RDF |
|
80 | Gogul Balakrishnan, Radu Gruian, Thomas W. Reps, Tim Teitelbaum |
CodeSurfer/x86-A Platform for Analyzing x86 Executables. |
CC |
2005 |
DBLP DOI BibTeX RDF |
|
74 | Jack Liu, Youfeng Wu |
Performance Characterization of the 64-bit x86 Architecture from Compiler Optimizations' Perspective. |
CC |
2006 |
DBLP DOI BibTeX RDF |
|
73 | P. Bosch, A. Carloganu, Daniel Etiemble |
Complete x86 instruction trace generation from hardware bus collect. |
EUROMICRO |
1997 |
DBLP DOI BibTeX RDF |
complete x86 instruction trace generation, hardware bus collect, architectural improvements, benchmark traces, hardware/software approach, x86 execution traces, commercial analyzer, computer architecture, microprocessors, memory hierarchies, trace driven simulation, performance data |
69 | Gogul Balakrishnan, Thomas W. Reps, Nicholas Kidd, Akash Lal, Junghee Lim, David Melski, Radu Gruian, Suan Hsi Yong, Chi-Hua Chen, Tim Teitelbaum |
Model Checking x86 Executables with CodeSurfer/x86 and WPDS++. |
CAV |
2005 |
DBLP DOI BibTeX RDF |
|
63 | Keith Adams, Ole Agesen |
A comparison of software and hardware techniques for x86 virtualization. |
ASPLOS |
2006 |
DBLP DOI BibTeX RDF |
MMU, nested paging, SVM, virtualization, virtual machine monitor, dynamic binary translation, TLB, x86, VT |
63 | Xuehai Qian, He Huang, Zhenzhong Duan, Junchao Zhang, Nan Yuan, Yongbin Zhou, Hao Zhang 0009, Huimin Cui, Dongrui Fan |
Optimized Register Renaming Scheme for Stack-Based x86 Operations. |
ARCS |
2007 |
DBLP DOI BibTeX RDF |
|
63 | Dong Ye 0004, Joydeep Ray, Christophe Harle, David R. Kaeli |
Performance Characterization of SPEC CPU2006 Integer Benchmarks on x86-64 Architecture. |
IISWC |
2006 |
DBLP DOI BibTeX RDF |
|
62 | Jih-Ching Chiu, I-Huan Huang, Chung-Ping Chung |
Design of Instruction Stream Buffer with Trace Support for X86 Processors. |
ICCD |
2000 |
DBLP DOI BibTeX RDF |
instruction stream buffer, x86 architecture, multiple instruction fetch, superscalar processor, ILP, Trace cache |
51 | Yoshiyuki Yamashita, Masato Tsuru |
Implementing Fast Packet Filters by Software Pipelining on x86 Processors. |
APPT |
2009 |
DBLP DOI BibTeX RDF |
|
51 | Bart Coppens 0001, Ingrid Verbauwhede, Koen De Bosschere, Bjorn De Sutter |
Practical Mitigations for Timing-Based Side-Channel Attacks on Modern x86 Processors. |
SP |
2009 |
DBLP DOI BibTeX RDF |
|
51 | Stevan A. Vlaovic, Edward S. Davidson |
TAXI: Trace Analysis for X86 Interpretation. |
ICCD |
2002 |
DBLP DOI BibTeX RDF |
|
51 | Anthony-Trung Nguyen, Maged M. Michael, Arun Sharma, Josep Torrellas |
The Augmint multiprocessor simulation toolkit for Intel x86 architectures. |
ICCD |
1996 |
DBLP DOI BibTeX RDF |
Augmint multiprocessor simulation toolkit, Intel x86 architectures, publicly available simulation tools, instruction mix, memory reference patterns, CISC architectures, execution driven multiprocessor simulation toolkit, m4 macro extended C, C++ applications, SPLASH-2 benchmark suites, thread based programming model, shared global address space, private stack space, simulator interface, MINT simulation toolkit, x8d based uniprocessor systems, multiprocessing systems, trace driven simulation, architecture simulators, uniprocessors |
45 | Kan Huang, Junlin Lu, Jiufeng Pang, Yansong Zheng, Hao Li, Dong Tong 0001, Xu Cheng 0001 |
FPGA prototyping of an amba-based windows-compatible SoC. |
FPGA |
2010 |
DBLP DOI BibTeX RDF |
fpga, microsoft windows, amba, x86 |
45 | Dimitri Tan, Carl Lemonds, Michael J. Schulte |
Low-Power Multiple-Precision Iterative Floating-Point Multiplier with SIMD Support. |
IEEE Trans. Computers |
2009 |
DBLP DOI BibTeX RDF |
|
45 | Shiliang Hu, James E. Smith 0001 |
Using Dynamic Binary Translation to Fuse Dependent Instructions. |
CGO |
2004 |
DBLP DOI BibTeX RDF |
|
45 | Brian Slechta, David Crowe, Brian Fahs, Michael Fertig, Gregory A. Muthler, Justin Quek, Francesco Spadini, Sanjay J. Patel, Steven Lumetta |
Dynamic Optimization of Micro-Operations. |
HPCA |
2003 |
DBLP DOI BibTeX RDF |
|
40 | Susmit Sarkar, Peter Sewell, Francesco Zappa Nardelli, Scott Owens, Tom Ridge, Thomas Braibant, Magnus O. Myreen, Jade Alglave |
The semantics of x86-CC multiprocessor machine code. |
POPL |
2009 |
DBLP DOI BibTeX RDF |
semantics, relaxed memory models |
40 | Hui Zeng, Matt T. Yourst, Kanad Ghose, Dmitry V. Ponomarev |
MPTLsim: a simulator for X86 multicore processors. |
DAC |
2009 |
DBLP DOI BibTeX RDF |
simulator, microprocessor, coherent cache |
40 | Hovav Shacham |
The geometry of innocent flesh on the bone: return-into-libc without function calls (on the x86). |
CCS |
2007 |
DBLP DOI BibTeX RDF |
return-into-libc, instruction set, turing completeness |
40 | Virginia Escuder, Raúl Durán, Rafael Rico |
Analysis of x86 ISA Condition Codes Influence on Superscalar Execution. |
HiPC |
2007 |
DBLP DOI BibTeX RDF |
Condition codes, Graph theory, Instruction level parallelism, Instruction set architecture |
40 | Rich Oehler |
Computer science - architecture - Re-inventing the x86 architecture: quad-core and beyond. |
SC |
2006 |
DBLP DOI BibTeX RDF |
|
40 | Anshuman S. Nadkarni, Tom Kenville |
TiGeR, the Transmeta Instruction GEneratoR: A Production Based, Pseudo Random Instruction x86 Test Generator. |
MTV |
2004 |
DBLP DOI BibTeX RDF |
|
40 | Mikael Pettersson, Konstantinos Sagonas, Erik Johansson |
The HiPE/x86 Erlang Compiler: System Description and Performance Evaluation. |
FLOPS |
2002 |
DBLP DOI BibTeX RDF |
|
40 | Zhiyu Wang, Mario A. Nascimento, Mike H. MacGregor |
A Multidisciplinary Approach for Online Detection of X86 Malicious Executables. |
CNSR |
2010 |
DBLP DOI BibTeX RDF |
online detection, X86 code abstraction, network security, pattern matching |
40 | Amol Vasudeva, Arvind Kumar Sharma, Ashish Kumar |
Saksham: Customizable x86 Based Multi-Core Microprocessor Simulator. |
CICSyN |
2009 |
DBLP DOI BibTeX RDF |
Microprocessor Simulator, x86 Architecture Simulator, Register/Instruction Set Simulator, Object oriented, Assembler |
40 | Chang-Chung Liu, R.-Ming Shiu, Chung-Ping Chung |
Register renaming for x86 superscalar design. |
ICPADS |
1996 |
DBLP DOI BibTeX RDF |
Intel x86 superscalar design, storage conflicts, data lengths, register write, register read, hardware renaming schemes, aggressive superscalar machine model, parallel architectures, instruction level parallelism, simulation results, microprocessor chips, register renaming |
35 | Azalea Raad, Luc Maranget, Viktor Vafeiadis |
Extending Intel-x86 consistency and persistency: formalising the semantics of Intel-x86 memory types and non-temporal stores. |
Proc. ACM Program. Lang. |
2022 |
DBLP DOI BibTeX RDF |
|
35 | Maria Mushtaq |
Software-based Detection and Mitigation of Microarchitectural Attacks on Intel's x86 Architecture. (Mise en oeuvre de mécanismes logiciels pour la détection et la prévention des attaques exploitant la micro-architecture des processeurs Intel x86). |
|
2019 |
RDF |
|
35 | Hojoon Lee 0001, Chihyun Song, Brent ByungHoon Kang |
Lord of the x86 Rings: A Portable User Mode Privilege Separation Architecture on x86. |
CoRR |
2018 |
DBLP BibTeX RDF |
|
35 | Hojoon Lee 0001, Chihyun Song, Brent ByungHoon Kang |
Lord of the x86 Rings: A Portable User Mode Privilege Separation Architecture on x86. |
CCS |
2018 |
DBLP DOI BibTeX RDF |
|
35 | Min Choi, Seungho Lim |
x86-Android performance improvement for x86 smart mobile devices. |
Concurr. Comput. Pract. Exp. |
2016 |
DBLP DOI BibTeX RDF |
|
35 | Peter Sewell, Susmit Sarkar, Scott Owens, Francesco Zappa Nardelli, Magnus O. Myreen |
x86-TSO: a rigorous and usable programmer's model for x86 multiprocessors. |
Commun. ACM |
2010 |
DBLP DOI BibTeX RDF |
|
35 | Johannes Kinder |
Static analysis of x86 executables (Statische Analyse von Programmen in x86-Maschinensprache). |
|
2010 |
RDF |
|
34 | Loïc Duflot |
CPU Bugs, CPU Backdoors and Consequences on Security. |
ESORICS |
2008 |
DBLP DOI BibTeX RDF |
hardware bug, hardware backdoor, CPU, x86 |
34 | Stevan A. Vlaovic, Edward S. Davidson |
Boosting trace cache performance with nonhead miss speculation. |
ICS |
2002 |
DBLP DOI BibTeX RDF |
optimization, branch prediction, trace cache, x86 |
34 | Peter Sewell |
Memory, an elusive abstraction. |
ISMM |
2010 |
DBLP DOI BibTeX RDF |
semantics, relaxed memory models |
34 | Gabriel H. Loh, Samantika Subramaniam, Yuejian Xie |
Zesto: A cycle-level simulator for highly detailed microarchitecture exploration. |
ISPASS |
2009 |
DBLP DOI BibTeX RDF |
|
34 | Gogul Balakrishnan, Thomas W. Reps |
Analyzing Stripped Device-Driver Executables. |
TACAS |
2008 |
DBLP DOI BibTeX RDF |
|
34 | Zhaozhong Ni, Dachuan Yu, Zhong Shao |
Using XCAP to Certify Realistic Systems Code: Machine Context Management. |
TPHOLs |
2007 |
DBLP DOI BibTeX RDF |
|
34 | Derek Chiou, Dam Sunwoo, Joonsoo Kim, Nikhil A. Patil, William H. Reinhart, Darrel Eric Johnson, Jebediah Keefe, Hari Angepat |
FPGA-Accelerated Simulation Technologies (FAST): Fast, Full-System, Cycle-Accurate Simulators. |
MICRO |
2007 |
DBLP DOI BibTeX RDF |
|
34 | Derek Chiou, Dam Sunwoo, Joonsoo Kim, Nikhil A. Patil, William H. Reinhart, Darrel Eric Johnson, Zheng Xu 0004 |
The FAST methodology for high-speed SoC/computer simulation. |
ICCAD |
2007 |
DBLP DOI BibTeX RDF |
|
34 | Jairo Panetta, Paulo R. P. de Souza Filho, Carlos A. da Cunha Filho, Fernando M. Roxo da Motta, Silvio Sinedino Pinheiro, Ivan Pedrosa Junior, Andre L. Romanelli Rosa, Luiz Rodolpho Monnerat, Leandro T. Carneiro, Carlos H. B. de Albrecht |
Computational Characteristics of Production Seismic Migration and its Performance on Novel Processor Architectures. |
SBAC-PAD |
2007 |
DBLP DOI BibTeX RDF |
|
34 | Paul A. Karger |
Performance and security lessons learned from virtualizing the alpha processor. |
ISCA |
2007 |
DBLP DOI BibTeX RDF |
virtualizability, security, virtual machine monitors, hypervisors |
34 | Junghee Lim, Thomas W. Reps, Ben Liblit |
Extracting Output Formats from Executables. |
WCRE |
2006 |
DBLP DOI BibTeX RDF |
|
34 | Michael Wolfe |
Software tools I - AMD versus Intel: the compiler as referee. |
SC |
2006 |
DBLP DOI BibTeX RDF |
|
34 | Elena Gabriela Barrantes, David H. Ackley, Trek S. Palmer, Darko Stefanovic, Dino Dai Zovi |
Randomized instruction set emulation to disrupt binary code injection attacks. |
CCS |
2003 |
DBLP DOI BibTeX RDF |
automated diversity, language randomization, security, emulation, information hiding, obfuscation |
34 | James C. Dehnert, Brian Grant, John P. Banning, Richard Johnson, Thomas Kistler, Alexander Klaiber, Jim Mattson |
The Transmeta Code Morphing - Software: Using Speculation, Recovery, and Adaptive Retranslation to Address Real-Life Challenges. |
CGO |
2003 |
DBLP DOI BibTeX RDF |
|
34 | James C. Dehnert |
The Transmeta Crusoe: VLIW Embedded in CISC. |
SCOPES |
2003 |
DBLP DOI BibTeX RDF |
|
34 | Steven Lucco |
Split-stream dictionary program compression. |
PLDI |
2000 |
DBLP DOI BibTeX RDF |
virtual machine, compression, runtime system |
33 | Eriko Nurvitadhi, James C. Hoe, Shih-Lien Lu, Timothy Kam |
Automatic multithreaded pipeline synthesis from transactional datapath specifications. |
DAC |
2010 |
DBLP DOI BibTeX RDF |
automatic pipelining, datapath specification, design exploration of x86 processor pipelines, multithreading, hardware synthesis |
33 | Jeffrey K. Hollingsworth, Barton P. Miller, M. J. R. Goncalves, Oscar Naim, Zhichen Xu, Ling Zheng |
MDL: A Language and Compiler for Dynamic Program Instrumentation. |
IEEE PACT |
1997 |
DBLP DOI BibTeX RDF |
dynamic program instrumentation, running programs, instrumentation code, PA-RISC, Power 2 architecture, Alpha architecture, x86 architecture, Metric Description Language, Paradyn Parallel Performance Tools, platform independent descriptions, message channels, modules, MDL, nodes, procedures, application program, compiler generators, SPARC, files, dynamic code generation, performance data |
33 | Thomas W. Lynch, Ashraf Ahmed, Michael J. Schulte, Thomas K. Callaway, Robert Tisdale |
The K5 transcendental functions. |
IEEE Symposium on Computer Arithmetic |
1995 |
DBLP DOI BibTeX RDF |
K5 transcendental functions, AMD x86 compatible superscalar microprocessor, multi-level development cycle, design schedule, table-driven reductions, multiprecision arithmetic operations, encoding, polynomials, floating point arithmetic, microprocessor chips, approximation theory, polynomial approximations |
29 | Magnus O. Myreen |
Verified just-in-time compiler on x86. |
POPL |
2010 |
DBLP DOI BibTeX RDF |
self-modifying code, just in time, compiler verification |
29 | Roberto Paleari, Lorenzo Martignoni, Giampaolo Fresi Roglia, Danilo Bruschi |
N-version disassembly: differential testing of x86 disassemblers. |
ISSTA |
2010 |
DBLP DOI BibTeX RDF |
differential testing, software testing, automatic test generation |
29 | Magnus O. Myreen, Michael J. C. Gordon |
Verified LISP Implementations on ARM, x86 and PowerPC. |
TPHOLs |
2009 |
DBLP DOI BibTeX RDF |
|
29 | Daniel Hackenberg, Daniel Molka, Wolfgang E. Nagel |
Comparing cache architectures and coherency protocols on x86-64 multicore SMP systems. |
MICRO |
2009 |
DBLP DOI BibTeX RDF |
Nehalem, Shanghai, benchmark, multi-core, coherency |
29 | Vlastimil Babka, Petr Tuma 0001 |
Investigating Cache Parameters of x86 Family Processors. |
SPEC Benchmark Workshop |
2009 |
DBLP DOI BibTeX RDF |
|
29 | Bratin Saha, Xiaocheng Zhou, Hu Chen, Ying Gao, Shoumeng Yan, Mohan Rajagopalan, Jesse Fang, Peinan Zhang, Ronny Ronen, Avi Mendelson |
Programming model for a heterogeneous x86 platform. |
PLDI |
2009 |
DBLP DOI BibTeX RDF |
programming model, heterogeneous platforms |
29 | Bennet Yee, David Sehr, Gregory Dardyk, J. Bradley Chen, Robert Muth, Tavis Ormandy, Shiki Okasaka, Neha Narula, Nicholas Fullagar |
Native Client: A Sandbox for Portable, Untrusted x86 Native Code. |
SP |
2009 |
DBLP DOI BibTeX RDF |
|
29 | Larry Seiler, Doug Carmean, Eric Sprangle, Tom Forsyth, Michael Abrash, Pradeep Dubey, Stephen Junkins, Adam T. Lake, Jeremy Sugerman, Robert Cavin, Roger Espasa, Ed Grochowski, Toni Juan, Pat Hanrahan |
Larrabee: a many-core x86 architecture for visual computing. |
ACM Trans. Graph. |
2008 |
DBLP DOI BibTeX RDF |
graphics architecture, many-core computing, realtime graphics, software rendering, throughput computing, visual computing, parallel processing, GPGPU, SIMD |
29 | Stefan Maus, Michal Moskal, Wolfram Schulte |
Vx86: x86 Assembler Simulated in C Powered by Automated Theorem Proving. |
AMAST |
2008 |
DBLP DOI BibTeX RDF |
|
29 | Wei Li 0020, Tzi-cker Chiueh |
Automated Format String Attack Prevention for Win32/X86 Binaries. |
ACSAC |
2007 |
DBLP DOI BibTeX RDF |
|
29 | Daniel Stodden, Hubert Eichner, Max Walter, Carsten Trinitis |
Hardware Instruction Counting for Log-Based Rollback Recovery on x86-Family Processors. |
ISAS |
2006 |
DBLP DOI BibTeX RDF |
|
29 | Marco Cova, Viktoria Felmetsger, Greg Banks, Giovanni Vigna |
Static Detection of Vulnerabilities in x86 Executables. |
ACSAC |
2006 |
DBLP DOI BibTeX RDF |
binary static analysis, symbolic execution, Vulnerability analysis, taint analysis |
29 | Susanta Nanda, Wei Li 0020, Lap-Chung Lam, Tzi-cker Chiueh |
Foreign Code Detection on the Windows/X86 Platform. |
ACSAC |
2006 |
DBLP DOI BibTeX RDF |
|
29 | Mihai Christodorescu, Nicholas Kidd, Wen-Han Goh |
String analysis for x86 binaries. |
PASTE |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Gogul Balakrishnan, Thomas W. Reps |
Analyzing Memory Accesses in x86 Executables. |
CC |
2004 |
DBLP DOI BibTeX RDF |
|
29 | Laurent Fournier, Yaron Arbetman, Moshe Levinger |
Functional Verification Methodology for Microprocessors Using the Genesys Test-Program Generator-Application to the x86 Microprocessors Family. |
DATE |
1999 |
DBLP DOI BibTeX RDF |
|
29 | Aaron B. Brown, Margo I. Seltzer |
Operating System Benchmarking in the Wake of Lmbench: A Case Study of the Performance of NetBSD on Intel x86 Architecture. |
SIGMETRICS |
1997 |
DBLP DOI BibTeX RDF |
|
23 | Yasushi Saito |
Jockey: a user-space library for record-replay debugging. |
AADEBUG |
2005 |
DBLP DOI BibTeX RDF |
execution record and replay, jockey, debugging, Linux, checkpointing, keywords, x86 |
23 | Ariel Ortiz |
Teaching the SIMD execution model: : assembling a few parallel programming skills. |
SIGCSE |
2003 |
DBLP DOI BibTeX RDF |
parallel computing, computer architecture, SIMD, assembly language, x86 |
23 | Greg DeFouw, Vaughan R. Pratt |
The Matchbox: A Small Wearable Platform. |
ISWC |
1999 |
DBLP DOI BibTeX RDF |
Matchbox PC, wearable computer, embedded computing, x86 |
22 | Robert Law |
Using student blogs for documentation in software development projects. |
ITiCSE |
2011 |
DBLP DOI BibTeX RDF |
|
22 | Graham Schelle, Jamison D. Collins, Ethan Schuchman, Perry H. Wang, Xiang Zou, Gautham N. Chinya, Ralf Plate, Thorsten Mattner, Franz Olbrich, Per Hammarlund, Ronak Singhal, Jim Brayton, Sebastian Steibl, Hong Wang 0003 |
Intel nehalem processor core made FPGA synthesizable. |
FPGA |
2010 |
DBLP DOI BibTeX RDF |
intel nehalem, synthesizable core, fpga, emulator |
22 | Dave Christie, Jae-Woong Chung, Stephan Diestelhorst, Michael Hohmuth, Martin Pohlack, Christof Fetzer, Martin Nowack, Torvald Riegel, Pascal Felber, Patrick Marlier, Etienne Rivière |
Evaluation of AMD's advanced synchronization facility within a complete transactional memory stack. |
EuroSys |
2010 |
DBLP DOI BibTeX RDF |
transactional memory |
22 | Ciji Isen, Lizy K. John, Eugene John |
A Tale of Two Processors: Revisiting the RISC-CISC Debate. |
SPEC Benchmark Workshop |
2009 |
DBLP DOI BibTeX RDF |
|
22 | Yanjun Wu, Tzi-cker Chiueh, Chen Zhao |
Efficient and Automatic Instrumentation for Packed Binaries. |
ISA |
2009 |
DBLP DOI BibTeX RDF |
|
22 | David M. Kunzman, Laxmikant V. Kalé |
Towards a framework for abstracting accelerators in parallel applications: experience with cell. |
SC |
2009 |
DBLP DOI BibTeX RDF |
|
22 | Erik Buchanan, Ryan Roemer, Hovav Shacham, Stefan Savage |
When good instructions go bad: generalizing return-oriented programming to RISC. |
CCS |
2008 |
DBLP DOI BibTeX RDF |
return-into-libc, return-oriented programming, RISC, SPARC |
22 | Wei Chen 0009, Hongyi Lu, Li Shen 0007, Zhiying Wang 0003, Nong Xiao, Dan Chen 0001 |
A Novel Hardware Assisted Full Virtualization Technique. |
ICYCS |
2008 |
DBLP DOI BibTeX RDF |
|
22 | Fernando Magno Quintão Pereira, Jens Palsberg |
Register allocation by puzzle solving. |
PLDI |
2008 |
DBLP DOI BibTeX RDF |
puzzle solving, register aliasing, register allocation |
22 | Pat Conway, Bill Hughes |
The AMD Opteron Northbridge Architecture. |
IEEE Micro |
2007 |
DBLP DOI BibTeX RDF |
system topology, northbridge, scalability, microarchitecture, point-to-point networking |
22 | Todd J. Foster, Dennis L. Lastor, Padmaraj Singh |
First Silicon Functional Validation and Debug of Multicore Microprocessors. |
IEEE Trans. Very Large Scale Integr. Syst. |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Xuehai Qian, He Huang, Hao Zhang 0009, Guoping Long, Junchao Zhang, Dongrui Fan |
Design and Implementation of Floating Point Stack on General RISC Architecture. |
PDP |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Hongxu Cai, Zhong Shao, Alexander Vaynberg |
Certified self-modifying code. |
PLDI |
2007 |
DBLP DOI BibTeX RDF |
assembly code verification, runtime code manipulation, self-modifying code, hoare logic, modular verification |
22 | Marek Olszewski, Keir Mierle, Adam Czajkowski, Angela Demke Brown |
JIT instrumentation: a novel approach to dynamically instrument operating systems. |
EuroSys |
2007 |
DBLP DOI BibTeX RDF |
kernel analysis tools, dynamic instrumentation, JIT compiler, binary rewriting |
22 | Jason Hickey, Aleksey Nogin |
Formal compiler construction in a logical framework. |
High. Order Symb. Comput. |
2006 |
DBLP DOI BibTeX RDF |
Formal compiler, Higher-order abstract syntax, Logical programming environment |
22 | Susanta Nanda, Wei Li 0020, Lap-Chung Lam, Tzi-cker Chiueh |
BIRD: Binary Interpretation using Runtime Disassembly. |
CGO |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Shiliang Hu, Ilhyun Kim, Mikko H. Lipasti, James E. Smith 0001 |
An approach for implementing efficient superscalar CISC processors. |
HPCA |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Adam Chlipala |
Modular development of certified program verifiers with a proof assistant. |
ICFP |
2006 |
DBLP DOI BibTeX RDF |
programming with dependent types, proof-carrying code, interactive proof assistants |
22 | Shiliang Hu, James E. Smith 0001 |
Reducing Startup Time in Co-Designed Virtual Machines. |
ISCA |
2006 |
DBLP DOI BibTeX RDF |
|
22 | Lap-Chung Lam, Tzi-cker Chiueh |
Checking Array Bound Violation Using Segmentation Hardware. |
DSN |
2005 |
DBLP DOI BibTeX RDF |
|
22 | Chi-Keung Luk, Robert S. Cohn, Robert Muth, Harish Patil, Artur Klauser, P. Geoffrey Lowney, Steven Wallace, Vijay Janapa Reddi, Kim M. Hazelwood |
Pin: building customized program analysis tools with dynamic instrumentation. |
PLDI |
2005 |
DBLP DOI BibTeX RDF |
program analysis tools, instrumentation, dynamic compilation |
22 | Daniel Luna, Mikael Pettersson, Konstantinos Sagonas |
Efficiently compiling a functional language on AMD64: the HiPE experience. |
PPDP |
2005 |
DBLP DOI BibTeX RDF |
AMD64, functional programming, erlang |
22 | Greg Bronevetsky, Daniel Marques, Keshav Pingali, Peter K. Szwed, Martin Schulz 0001 |
Application-level checkpointing for shared memory programs. |
ASPLOS |
2004 |
DBLP DOI BibTeX RDF |
fault-tolerance, checkpointing, openMP, shared-memory programs |
22 | Jason Hickey, Aleksey Nogin, Adam Granicz |
Compiler implementation in a formal logical framework. |
MERLIN |
2003 |
DBLP DOI BibTeX RDF |
formal compiler, higher-order abstract syntax, logical programming environment |
22 | Ing-Jer Huang, Ping-Huei Xie |
Application of instruction analysis/scheduling techniques to resource allocation of superscalar processors. |
IEEE Trans. Very Large Scale Integr. Syst. |
2002 |
DBLP DOI BibTeX RDF |
|
22 | Jun Xu 0003, Shuo Chen 0001, Zbigniew Kalbarczyk, Ravishankar K. Iyer |
An Experimental Study of Security Vulnerabilities Caused by Errors. |
DSN |
2001 |
DBLP DOI BibTeX RDF |
|
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