Search results for "DFTS"

Hits ?▲	Authors	Title	Venue	Year	Link
1	Alirad Malek, Stavros Tzilis, Danish Anis Khan, Ioannis Sourdis, Georgios Smaragdos, Christos Strydis	Reducing the performance overhead of resilient CMPs with substitutable resources.	DFTS	2015	DBLP DOI BibTeX RDF
1	Senwen Kan, Marco Ottavi, Jennifer Dworak	Enhancing embedded SRAM security and error tolerance with hardware CRC and obfuscation.	DFTS	2015	DBLP DOI BibTeX RDF
1	Gustavo K. Contreras, Nisar Ahmed, LeRoy Winemberg, Mark M. Tehranipoor	Predictive LBIST model and partial ATPG for seed extraction.	DFTS	2015	DBLP DOI BibTeX RDF
1	Puneet Ramesh Savanur, Phaninder Alladi, Spyros Tragoudas	A BIST approach for counterfeit circuit detection based on NBTI degradation.	DFTS	2015	DBLP DOI BibTeX RDF
1	Asad Amin Bawa, Nur A. Touba	Improving X-tolerant combinational output compaction via input rotation.	DFTS	2015	DBLP DOI BibTeX RDF
1	Zhixi Yang, Jie Han 0001, Fabrizio Lombardi	Approximate compressors for error-resilient multiplier design.	DFTS	2015	DBLP DOI BibTeX RDF
1	Hyunseung Han, Joon-Sung Yang	Asymmetric ECC organization in 3D-memory via spare column utilization.	DFTS	2015	DBLP DOI BibTeX RDF
1	Shuai Chen, Junlin Chen, Domenic Forte, Jia Di, Mark M. Tehranipoor, Lei Wang 0003	Chip-level anti-reverse engineering using transformable interconnects.	DFTS	2015	DBLP DOI BibTeX RDF
1	Salin Junsangsri, Fabrizio Lombardi, Jie Han 0001	Evaluating the impact of spike and flicker noise in phase change memories.	DFTS	2015	DBLP DOI BibTeX RDF
1	Daniele Felici, Sandro Bonacini, Marco Ottavi	Characterization of low power radiation-hard reed-solomon code protected serializers in 65-nm for HEP experiments electronics.	DFTS	2015	DBLP DOI BibTeX RDF
1	Sami Teravainen, Mohammad Hashem Haghbayan, Amir-Mohammad Rahmani, Pasi Liljeberg, Hannu Tenhunen	Software-based on-chip thermal sensor calibration for DVFS-enabled many-core systems.	DFTS	2015	DBLP DOI BibTeX RDF
1	Sk Subidh Ali, Ozgur Sinanoglu	Scan attack on Elliptic Curve Cryptosystem.	DFTS	2015	DBLP DOI BibTeX RDF
1	Mohammad Hashem Haghbayan, Sami Teravainen, Amir-Mohammad Rahmani, Pasi Liljeberg, Hannu Tenhunen	Adaptive fault simulation on many-core microprocessor systems.	DFTS	2015	DBLP DOI BibTeX RDF
1	Nicolas Borrel, Clement Champeix, Edith Kussener, Wenceslas Rahajandraibe, Mathieu Lisart, Alexandre Sarafianos, Jean-Max Dutertre	Influence of triple-well technology on laser fault injection and laser sensor efficiency.	DFTS	2015	DBLP DOI BibTeX RDF
1	Jerry Backer, David Hély, Ramesh Karri	On enhancing the debug architecture of a system-on-chip (SoC) to detect software attacks.	DFTS	2015	DBLP DOI BibTeX RDF
1	Junlin Chen, Lei Wang 0003	Low-power LDPC decoder design exploiting memory error statistics.	DFTS	2015	DBLP DOI BibTeX RDF
1	Jimson Mathew, Yuamfam Yang, M. Ottavia, T. Browna, A. Zampettia, A. Di Carloa, A. M. Jabirb, Dhiraj K. Pradhan	Fault detection and repair of DSC arrays through memristor sensing.	DFTS	2015	DBLP DOI BibTeX RDF
1	Mani Soma	On-line detection of intermittent faults in digital-to-analog converters.	DFTS	2015	DBLP DOI BibTeX RDF
1	Cagatay Ozmen, Aydin Dirican, Nurettin Tan, Hieu Nguyen, Martin Margala	A CMOS ripple detector for integrated voltage regulator testing.	DFTS	2015	DBLP DOI BibTeX RDF
1	Clement Champeix, Nicolas Borrel, Jean-Max Dutertre, Bruno Robisson, Mathieu Lisart, Alexandre Sarafianos	SEU sensitivity and modeling using pico-second pulsed laser stimulation of a D Flip-Flop in 40 nm CMOS technology.	DFTS	2015	DBLP DOI BibTeX RDF
1	Pedro Reviriego, Salvatore Pontarelli, Juan Antonio Maestro, Marco Ottavi	A method to protect Bloom filters from soft errors.	DFTS	2015	DBLP DOI BibTeX RDF
1	Mehran Mozaffari Kermani, Reza Azarderakhsh	Reliable hash trees for post-quantum stateless cryptographic hash-based signatures.	DFTS	2015	DBLP DOI BibTeX RDF
1	Michael Opoku Agyeman, Kin-Fai Tong, Terrence S. T. Mak	Towards reliability and performance-aware Wireless Network-on-Chip design.	DFTS	2015	DBLP DOI BibTeX RDF
1	Cristiana Bolchini, Luca Cassano	A configurable board-level adaptive incremental diagnosis technique based on decision trees.	DFTS	2015	DBLP DOI BibTeX RDF
1	Jyothish Soman, Negar Miralaei, Alan Mycroft, Timothy M. Jones 0001	REPAIR: Hard-error recovery via re-execution.	DFTS	2015	DBLP DOI BibTeX RDF
1	Tengteng Zhang, D. M. H. Walker	Impact of test compression on power supply noise control.	DFTS	2015	DBLP DOI BibTeX RDF
1	Glenn H. Chapman, Rahul Thomas, Rohan Thomas, Klinsmann J. Coelho Silva Meneses, Tommy Q. Yang, Israel Koren, Zahava Koren	Single Event Upsets and Hot Pixels in digital imagers.	DFTS	2015	DBLP DOI BibTeX RDF
1	Seyyed Hasan Mozafari, Brett H. Meyer	Hot spare components for performance-cost improvement in multi-core SIMT.	DFTS	2015	DBLP DOI BibTeX RDF
1	Manolis Kaliorakis, Sotiris Tselonis, Athanasios Chatzidimitriou, Dimitris Gizopoulos	Accelerated microarchitectural Fault Injection-based reliability assessment.	DFTS	2015	DBLP DOI BibTeX RDF
1	Diego G. Rodrigues, Ghazaleh Nazarian, Álvaro F. Moreira, Luigi Carro, Georgi Gaydadjiev	A non-conservative software-based approach for detecting illegal CFEs caused by transient faults.	DFTS	2015	DBLP DOI BibTeX RDF
1	Bahar J. Farahani, Saeed Safari	A cross-layer approach to online adaptive reliability prediction of transient faults.	DFTS	2015	DBLP DOI BibTeX RDF
1		2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015, Amherst, MA, USA, October 12-14, 2015	DFTS	2015	DBLP BibTeX RDF
1	Felipe Rosa 0001, Fernanda Lima Kastensmidt, Ricardo Reis 0001, Luciano Ost	A fast and scalable fault injection framework to evaluate multi/many-core soft error reliability.	DFTS	2015	DBLP DOI BibTeX RDF
1	Adedotun A. Adeyemo, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan	Exploring error-tolerant low-power multiple-output read scheme for memristor-based memory arrays.	DFTS	2015	DBLP DOI BibTeX RDF
1	Alexander Schöll, Claus Braun, Michael A. Kochte, Hans-Joachim Wunderlich	Low-overhead fault-tolerance for the preconditioned conjugate gradient solver.	DFTS	2015	DBLP DOI BibTeX RDF
1	Kamran Saleem, Sreenivaas S. Muthyala, Nur A. Touba	Compacting output responses containing unknowns using an embedded processor.	DFTS	2015	DBLP DOI BibTeX RDF
1	Badrun Nahar 0001, Brett H. Meyer	RotR: Rotational redundant task mapping for fail-operational MPSoCs.	DFTS	2015	DBLP DOI BibTeX RDF
1	Ignacio Herrera-Alzu, Marisa López-Vallejo, C. Gil Soriano	A Dual-Layer Fault Manager for systems based on Xilinx Virtex FPGAs.	DFTS	2015	DBLP DOI BibTeX RDF
1	Muralidharan Venkatasubramanian, Vishwani D. Agrawal, James J. Janaher	Quest for a quantum search algorithm for testing stuck-at faults in digital circuits.	DFTS	2015	DBLP DOI BibTeX RDF
1	Irith Pomeranz	Piecewise-functional broadside tests based on intersections of reachable states.	DFTS	2015	DBLP DOI BibTeX RDF
1	Tomohiro Yoneda, Masashi Imai, Hiroshi Saito, Kenji Kise	Dependable real-time task execution scheme for a many-core platform.	DFTS	2015	DBLP DOI BibTeX RDF
1	Muhammad Yasin, Bodhisatwa Mazumdar, Sk Subidh Ali, Ozgur Sinanoglu	Security analysis of logic encryption against the most effective side-channel attack: DPA.	DFTS	2015	DBLP DOI BibTeX RDF
1	Abdulaziz Eker, Oguz Ergin	Using value similarity of registers for soft error mitigation.	DFTS	2015	DBLP DOI BibTeX RDF
1	Mohammad Raashid Ansari, Shucheng Yu, Qiaoyan Yu	IntelliCAN: Attack-resilient Controller Area Network (CAN) for secure automobiles.	DFTS	2015	DBLP DOI BibTeX RDF
1	Kundan Nepal, Xi Shen, Jennifer Dworak, Theodore W. Manikas, R. Iris Bahar	Built-in Self-Repair in a 3D die stack using programmable logic.	DFTS	2013	DBLP DOI BibTeX RDF
1	Emanuel Dogaru, Filipe Vinci dos Santos, William Rebernak	LMS-based RF BIST architecture for multistandard transmitters.	DFTS	2013	DBLP DOI BibTeX RDF
1	Chen Liu 0013, Jeyavijayan Rajendran, Chengmo Yang, Ramesh Karri	Shielding heterogeneous MPSoCs from untrustworthy 3PIPs through security-driven task scheduling.	DFTS	2013	DBLP DOI BibTeX RDF
1	Caleb Serafy, Ankur Srivastava 0001	Online TSV health monitoring and built-in self-repair to overcome aging.	DFTS	2013	DBLP DOI BibTeX RDF
1	Lanfang Tan, Ying Tan, Jianjun Xu	CFEDR: Control-flow error detection and recovery using encoded signatures monitoring.	DFTS	2013	DBLP DOI BibTeX RDF
1	Jianli Li, Qingping Tan	SmartInjector: Exploiting intelligent fault injection for SDC rate analysis.	DFTS	2013	DBLP DOI BibTeX RDF
1	Alexandre Sarafianos, Mathieu Lisart, Olivier Gagliano, Valerie Serradeil, Cyril Roscian, Jean-Max Dutertre, Assia Tria	Robustness improvement of an SRAM cell against laser-induced fault injection.	DFTS	2013	DBLP DOI BibTeX RDF
1	Rafal Baranowski, Alejandro Cook, Michael E. Imhof, Chang Liu 0010, Hans-Joachim Wunderlich	Synthesis of workload monitors for on-line stress prediction.	DFTS	2013	DBLP DOI BibTeX RDF
1	Qiaoyan Yu, Jonathan Frey	Exploiting error control approaches for Hardware Trojans on Network-on-Chip links.	DFTS	2013	DBLP DOI BibTeX RDF
1	Glenn H. Chapman, Rohit Thomas, Israel Koren, Zahava Koren	Improved image accuracy in Hot Pixel degraded digital cameras.	DFTS	2013	DBLP DOI BibTeX RDF
1	Sushmita Kadiyala Rao, Ryan W. Robucci, Chintan Patel	Framework for dynamic estimation of power-supply noise and path delay.	DFTS	2013	DBLP DOI BibTeX RDF
1	Meilin Zhang, Paul Ampadu	Variation-tolerant cache by two-layer error control codes.	DFTS	2013	DBLP DOI BibTeX RDF
1	Kouta Maebashi, Kazuteru Namba, Masato Kitakami	Testing of switch blocks in TSV-reduced Three-Dimensional FPGA.	DFTS	2013	DBLP DOI BibTeX RDF
1	Kazuteru Namba, Fabrizio Lombardi	A novel scheme for concurrent error detection of OLS parallel decoders.	DFTS	2013	DBLP DOI BibTeX RDF
1	Pedro Reviriego, Shih-Fu Liu, Juan Antonio Maestro, S. Lee, Nur A. Touba, Rudrajit Datta	Implementing triple adjacent Error Correction in double error correction Orthogonal Latin Squares Codes.	DFTS	2013	DBLP DOI BibTeX RDF
1	Hassan Ghasemzadeh Mohammadi, Pierre-Emmanuel Gaillardon, Majid Yazdani, Giovanni De Micheli	A fast TCAD-based methodology for Variation analysis of emerging nano-devices.	DFTS	2013	DBLP DOI BibTeX RDF
1	Elena I. Vatajelu, Georgios Tsiligiannis, Luigi Dilillo, Alberto Bosio, Patrick Girard 0001, Serge Pravossoudovitch, Aida Todri, Arnaud Virazel, Frederic Wrobel, Frédéric Saigné	On the correlation between Static Noise Margin and Soft Error Rate evaluated for a 40nm SRAM cell.	DFTS	2013	DBLP DOI BibTeX RDF
1	Ting An, Lirida Alves de Barros Naviner, Philippe Matherat	A low cost reliable architecture for S-Boxes in AES processors.	DFTS	2013	DBLP DOI BibTeX RDF
1	Matheus T. Moreira, Bruno S. Oliveira, Fernando Gehm Moraes, Ney Laert Vilar Calazans	Charge sharing aware NCL gates design.	DFTS	2013	DBLP DOI BibTeX RDF
1	Michael A. Skitsas, Chrysostomos Nicopoulos, Maria K. Michael	DaemonGuard: O/S-assisted selective software-based Self-Testing for multi-core systems.	DFTS	2013	DBLP DOI BibTeX RDF
1	Aleksandar Simevski, Rolf Kraemer, Milos Krstic	Automated integration of fault injection into the ASIC design flow.	DFTS	2013	DBLP DOI BibTeX RDF
1	Arwa Ben Dhia, Lirida A. B. Naviner, Philippe Matherat	Evaluating CLB designs under multiple SETs in SRAM-based FPGAs.	DFTS	2013	DBLP DOI BibTeX RDF
1	Saif-Ur Rehman, Mounir Benabdenbi, Lorena Anghel	BIST for logic and local interconnect resources in a novel mesh of cluster FPGA.	DFTS	2013	DBLP DOI BibTeX RDF
1		2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2013, New York City, NY, USA, October 2-4, 2013	DFTS	2013	DBLP BibTeX RDF
1	Kun Bian, D. M. H. Walker, Sunil P. Khatri, Shayak Lahiri	Mixed structural-functional path delay test generation and compaction.	DFTS	2013	DBLP DOI BibTeX RDF
1	Muhammad Aamir Khan 0002, Hans G. Kerkhoff	Analysing degradation effects in charge-redistribution SAR ADCs.	DFTS	2013	DBLP DOI BibTeX RDF
1	Atefe Dalirsani, Michael A. Kochte, Hans-Joachim Wunderlich	SAT-based code synthesis for fault-secure circuits.	DFTS	2013	DBLP DOI BibTeX RDF
1	Veit Kleeberger, Daniel Mueller-Gritschneder, Ulf Schlichtmann	Technology-aware system failure analysis in the presence of soft errors by Mixture Importance Sampling.	DFTS	2013	DBLP DOI BibTeX RDF
1	Rance Rodrigues, Sandip Kundu	A low power architecture for online detection of execution errors in SMT processors.	DFTS	2013	DBLP DOI BibTeX RDF
1	Manoj Kumar 0001, Pankaj Kumar Srivastava, Vijay Laxmi, Manoj Singh Gaur, Seok-Bum Ko	Reconfigurable distributed fault tolerant routing algorithm for on-chip networks.	DFTS	2013	DBLP DOI BibTeX RDF
1	Naseef Mansoor, Amlan Ganguly, Manoj Prashanth Yuvaraj	An energy-efficient and robust millimeter-wave Wireless Network-on-Chip architecture.	DFTS	2013	DBLP DOI BibTeX RDF
1	Soroush Khaleghi, Wenjing Rao	Spare sharing network enhancement for scalable systems.	DFTS	2013	DBLP DOI BibTeX RDF
1	Kaikai Liu, Hao Cai, Ting An, Lirida A. B. Naviner, Jean-François Naviner, Hervé Petit	Reliability analysis of combinational circuits with the influences of noise and single-event transients.	DFTS	2013	DBLP DOI BibTeX RDF
1	Masayoshi Yoshimura, Amy Ogita, Toshinori Hosokawa	A smart Trojan circuit and smart attack method in AES encryption circuits.	DFTS	2013	DBLP DOI BibTeX RDF
1	Shida Zhong, S. Saqib Khursheed, Bashir M. Al-Hashimi	Impact of PVT variation on delay test of resistive open and resistive bridge defects.	DFTS	2013	DBLP DOI BibTeX RDF
1	Alexandru Paler, Josef Kinseher, Ilia Polian, John P. Hayes	Approximate simulation of circuits with probabilistic behavior.	DFTS	2013	DBLP DOI BibTeX RDF
1	Jianghao Guo, Qiang Han, Wen-Ben Jone, Yu-Liang Wu	A cross-layer fault-tolerant design method for high manufacturing yield and system reliability.	DFTS	2013	DBLP DOI BibTeX RDF
1	Patryk Skoncej	Fault Injection Framework for embedded memories.	DFTS	2013	DBLP DOI BibTeX RDF
1	Natesh Ganesh, Neal G. Anderson	On-chip error correction with unreliable decoders: Fundamental physical limits.	DFTS	2013	DBLP DOI BibTeX RDF
1	Asad Amin Bawa, Muhammad Tauseef Rab, Nur A. Touba	Efficient compression of x-masking control data via dynamic channel allocation.	DFTS	2013	DBLP DOI BibTeX RDF
1	Yu-Wei Lee, Nur A. Touba	Unified 3D test architecture for variable test data bandwidth across pre-bond, partial stack, and post-bond test.	DFTS	2013	DBLP DOI BibTeX RDF
1	J.-Y. Hung, Noh-Jin Park, K. M. George, Nohpill Park	Modeling and analysis of repair and maintenance processes in Fault Tolerant Systems.	DFTS	2013	DBLP DOI BibTeX RDF
1	Irith Pomeranz	Classes of difficult-to-diagnose transition fault clusters.	DFTS	2013	DBLP DOI BibTeX RDF
1	Amir-Pasha Mirbaha, Jean-Max Dutertre, Assia Tria	Differential analysis of Round-Reduced AES faulty ciphertexts.	DFTS	2013	DBLP DOI BibTeX RDF
1	Gustavo K. Contreras, Md. Tauhidur Rahman 0001, Mohammad Tehranipoor	Secure Split-Test for preventing IC piracy by untrusted foundry and assembly.	DFTS	2013	DBLP DOI BibTeX RDF
1	Stefano Campitelli, Marco Ottavi, Salvatore Pontarelli, Alessandro Marchioro, Daniele Felici, Fabrizio Lombardi	F-DICE: A multiple node upset tolerant flip-flop for highly radioactive environments.	DFTS	2013	DBLP DOI BibTeX RDF
1	Cristiana Bolchini, Elisa Quintarelli, Fabio Salice, Paolo Garza	A data mining approach to incremental adaptive functional diagnosis.	DFTS	2013	DBLP DOI BibTeX RDF
1	Cristiana Bolchini, Matteo Carminati, Antonio Miele, Anup Das 0001, Akash Kumar 0001, Bharadwaj Veeravalli	Run-time mapping for reliable many-cores based on energy/performance trade-offs.	DFTS	2013	DBLP DOI BibTeX RDF
1	Chandra Babu Dara, Themistoklis Haniotakis, Spyros Tragoudas	Low power and high speed current-mode memristor-based TLGs.	DFTS	2013	DBLP DOI BibTeX RDF
1	Mottaqiallah Taouil, Said Hamdioui, Erik Jan Marinissen, Sudipta Bhawmik	Impact of mid-bond testing in 3D stacked ICs.	DFTS	2013	DBLP DOI BibTeX RDF
1	Hassan Salmani, Mohammad Tehranipoor	Analyzing circuit vulnerability to hardware Trojan insertion at the behavioral level.	DFTS	2013	DBLP DOI BibTeX RDF

Publications at "DFTS"( http://dblp.L3S.de/Venues/DFTS )