| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Carlos González 0002, Daniel Mozos, Javier Resano, Antonio Plaza |
FPGA for Computing the Pixel Purity Index Algorithm on Hyperspectral Images.  |
ERSA  |
2010 |
DBLP BibTeX RDF |
|
| 1 | Christophe Bobda, Ali Akbar Zarezadeh, Felix Mühlbauer, Robert Hartmann, Kevin Cheng 0003 |
Reconfigurable Architecture for Distributed Smart Cameras. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Zhanpeng Jin, Richard Neil Pittman, Alessandro Forin |
FPGA-Accelerated Floating-Point Customization on Extensible Computing Systems. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Lionel Torres, Yoann Guillemenet, Syed Zahid Ahmed |
A Dynamic Reconfigurable MRAM based FPGA. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Hasitha Muthumala Waidyasooriya, Daisuke Okumura, Masanori Hariyama, Michitaka Kameyama |
Mapping for a Heterogeneous Multi-Core Media Processor Considering the Data Transfer Time. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Masanori Hariyama, Ryoto Tsuchiya, Shota Ishihara, Michitaka Kameyama |
An Field-Programmable VLSI Based on Synchronous/Asynchronous Hybrid Architecture. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Ali Akbar Zarezadeh, Christophe Bobda |
Hardware ORB Middleware for Distributed Smart Camera Systems. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Jon Huppenthal |
Looking Ahead at Heterogeneous Systems: A Suppliers Perspective. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Vijaykrishnan Narayanan, Ahmed Al-Maashri, Kevin M. Irick, Michael DeBole, Sungho Park |
AutoFLEX: A Framework for Image Processing Applications on Multiple-FPGA Systems. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Guy Gogniat, Jorgiano Vidal, Linfeng Ye, Jérémie Crenne, Sébastien Guillet, Florent de Lamotte, Jean-Philippe Diguet, Pierre Bomel |
Self-reconfigurable Embedded Systems: From Modeling to Implementation. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Ronald F. DeMara, Jooheung Lee, Rawad N. Al-Haddad, Rashad S. Oreifej, Rizwan A. Ashraf, Brian Stensrud, Michael Quist |
Dynamic Partial Reconfiguration Approach to the Design of Sustainable Edge Detectors. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Ann Gordon-Ross, Abelardo Jara-Berrocal |
VAPRES: A Customizable and Flexible Base Architecture for Partially Reconfigurable Systems. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Avishek Chakraborty, David A. Kearney, Mark Jasiunas |
Distributed Reconfiguration. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Roger D. Chamberlain, Joseph M. Lancaster |
Better Languages for More Effective Designing. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Eric Stahlberg |
Standards for Sustainability - Growing Markets and Improving Access for Reconfigurable Supercomputing. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Tony Brewer |
Effective Integration of FPGAs into Commercial High Performance Computing (HPC) Applications. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Casey Reardon, Alan D. George, Greg Stitt, Herman Lam |
An Automated Scheduling and Partitioning Algorithm for Scalable Reconfigurable Computing Systems. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Fadi Obeidat, Robert H. Klenke |
Application-Independent FPGA-based Profiling. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Srikanth Nadella, Andrew Dittes, Jack S. N. Jean |
Parameterized AND-OR Trees for FPGA Design Space Exploration. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Daisaku Seto, Minoru Watanabe |
Partial Block-by-Block Reconfiguration for a Dynamic Optically Reconfigurable Gate Array. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Shaon Yousuf, Ann Gordon-Ross |
DAPR: Design Automation for Partially Reconfigurable FPGAs. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Lars Middendorf, Christophe Bobda |
Declarative Programming with Handel-C. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Enno Lübbers, Marco Platzner, Christian Plessl, Ariane Keller, Bernhard Plattner |
Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Pranav Vaidya, Yu Chen, Jaehwan John Lee, Chandima H. Nadungodage, Yuni Xia |
A General Purpose FPGA Data Filter for Data Stream Processing. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Heiner Giefers, Marco Platzner |
A Self-Reconfigurable Lightweight Interconnect for Scalable Processor Fabrics. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Brian Holland, Alan D. George, Herman Lam |
Integrating Application Specification and Performance Prediction for Strategic Design-Space Exploration. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Rhonda Kay Gaede, David Moody, Michael Adderley, Charles Fulks, Laurie L. Joiner, Jeffrey H. Kulick |
A Model-Based Design Approach For Realizing Signal Processing Systems in FPGAs. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Alan D. George, Herman Lam, Abhijeet Lawande, Carlo Pascoe, Greg Stitt |
Novo-G: A View at the HPC Crossroads for Scientific Computing. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Mariusz Grad, Christian Plessl |
An Open Source Circuit Library with Benchmarking Facilities. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Akira Yamawaki 0002, Seiichi Serikawa |
An Architecture of Prototyping System for Dynamic Partial Reconfiguration on FPGA. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Sara Román Navarro, Hortensia Mecha, Daniel Mozos |
A Constant Complexity Allocation Algorithm for Reconfigurable Systems Management Adapted to Heterogeneous Workload Profiles. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Vaughn Betz, Stephen Brown |
Recent FPGA Advances and Challenges. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Grzegorz Cieslewski, Alan D. George, Adam Jacobs |
Acceleration of FPGA Fault Injection Through Multi-Bit Testing. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | David Foster, Darrin M. Hanna |
Implementing Error Detection and Error Correction with Explicit Area Constraints. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Peter Jamieson |
Persistent CAD for in-the-field Power Optimization. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | R. Kent Koeninger |
Targeting Cancer, One FPGA at a Time. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Xabier Iturbe, Khaled Benkrid, Tughrul Arslan, Imanol Martinez, Mikel Azkarate-askasua, Alicia Morales-Reyes |
Evolutionary Dynamic Allocation of Relocatable Modules onto Partially Damaged Xilinx FPGAs. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama |
Architecture of an FPGA-Oriented Heterogeneous Multi-core Processor with SIMD-Accelerator Cores. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Russell Tessier, Salma Mirza, J. Blair Perot |
Reconfigurable Sparse Matrix-Vector Multiplication on FPGAs. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Seth Koehler, Alan D. George |
Performance Visualization and Exploration for Reconfigurable Computing Applications. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Toomas P. Plaks, David Andrews 0001, Ronald F. DeMara, Herman Lam, Jooheung Lee, Christian Plessl, Greg Stitt (eds.) |
Proceedings of the 2010 International Conference on Engineering of Reconfigurable Systems & Algorithms, ERSA 2010, July 12-15, 2010, Las Vegas Nevada, USA |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | David Andrews 0001, Christian Plessl |
Configurable Processor Architectures: History and Trends. |
ERSA |
2010 |
DBLP BibTeX RDF |
|
| 1 | Mahmood Fazlali, Ali Zakerolhosseini, Mojtaba Sabeghi, Koen Bertels, Georgi Gaydadjiev |
Data path Configuration Time Reduction for Run-time Reconfigurable Systems. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Pierre-André Mudry, Gianluca Tempesti |
A Design Environment for Bio-Inspired Cellular Architectures. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Shota Ishihara, Yoshiya Komatsu, Masanori Hariyama, Michitaka Kameyama |
An Asynchronous Field-Programmable VLSI Using LEDR/4-Phase-Dual-Rail Protocol Converters. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Jose L. Muñoz |
It's Like Deja-Vu All over Again ... Again. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Guojun Dai, Peng Liu 0027, Y. Fun Hu, Geyong Min, Zhigang Gao |
Transformable Vertexes Information based Algorithm for Online Task Placement in Reconfigurable System. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Philip Top, Maya B. Gokhale |
Application Experiments: MPPA and FPGA. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama |
Acceleration of Optical-Flow Extraction Using Dynamically Reconfigurable ALU Arrays. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Christophe Jégo |
FPGA Prototyping Approach for the Validation of Efficient Iterative Decoders in Digital Communication Systems. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Scott Sirowy, Alessandro Forin |
Lost in Space! Quantifying the Elements of FPGA Speedup. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Shinya Kubota, Minoru Watanabe |
A Multi-Context Programmable Optically Reconfigurable Gate Array. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Jürgen Becker 0001 |
Adaptive Multicore Systems-on-Chip (MSoC) - Design and Computing in the Nano Era. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Viktor K. Prasanna |
Algorithm Design for Reconfigurable Computing Systems. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Yoshiki Saito, Toru Sano, Masaru Kato, Vasutan Tunbunheng, Yoshihiro Yasuda, Hideharu Amano |
A Real Chip Evaluation of MuCCRA-3: A Low Power Dycamically Reconfigurable Processor Array. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Pranav Vaidya, Jaehwan John Lee |
A Novel Multicontext Coarse-Grained Join Accelerator for Column-Oriented Databases. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Wim Vanderbauwhede, Martin Margala, Sai Rahul Chalamalasetti, Sohan Purohit |
Programming Model and Low-level Language for a Coarse-Grained Reconfigurable Multimedia Processor. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Madhura Purnaprajna, Christopher Pohl, Mario Porrmann, Ulrich Rückert 0001 |
Using Run-time Reconfiguration for Energy Savings in Parallel Data Processing. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Guolei Zhu, Heng Yu 0001, Yajun Ha, Yingmin Wang |
A Multi-Application Mapping Framework for Network-on-Chip Based MPSoC: An FPGA Implementation Case Study. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Peter Athanas |
Element CXI: Exploring Element Computing in Academia. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Austin Rogers, Aleksandar Milenkovic |
An Implementation of Security Extensions for Data Integrity and Confidentiality in Soft-Core Processors. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Christophe Wolinski, Krzysztof Kuchcinski, Kevin J. M. Martin, Erwan Raffin, François Charot |
How Constrains Programming Can Help You in the Generation of Optimized Application Specific Reconfigurable Processor Extensions. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Hironobu Morita, Minoru Watanabe |
Alignment compensation method for an optically reconfigurable gate array. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Mariusz Grad, Christian Plessl |
Woolcano: An Architecture And Tool Flow For Dynamic Instruction Set Extension On Xilinx Virtex-4 FX. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Kenneth C. Rovers, Marcel D. van de Burgwal, Jan Kuper, Gerard J. M. Smit |
Towards Effective Modeling and Programming Multi-core Tiled Reconfigurable Architectures. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Guillermo Botella Juan, Uwe Meyer-Bäse, Antonio García Ríos, Luís Parrilla Roure |
Improved gradient-based motion estimation on reconfigurable platforms. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Zahir Larabi, Yves Mathieu, Stéphane Mancini |
High Efficiency Reconfigurable Cache for Image Processing. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Hideharu Amano |
Japanese Dynamically Reconfigurable Processors. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Rahul Razdan |
Future Directions in Reconfigurable Computing. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Andrea Abba, Antonio Manenti, Andrea Suardi, Angelo Geraci, Giancarlo Ripamonti |
Implementation of the Gauss-Newton Algorithm for Non-linear Least-mean-squares Fitting in FPGA Devices. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Luigi Carro, Monica Magalhães Pereira |
Adaptive Processing Architectures for the Ultimate Scaling of the CMOS World. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Ying Li, Bridget Benson, Ryan Kastner, Xing Zhang |
Bit Error Rate, Power and Area Analysis of Multiple FPGA Implementations of Underwater FSK. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Shota Ishihara, Noriaki Idobata, Masanori Hariyama, Michitaka Kameyama |
A Fine-Grain SIMD Architecture Based on Flexible Ferroelectric-Capacitor Logic. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Hassan Edrees, Brian Cheung, McCullen Sandora, David B. Nummey, Deian Stefan |
Hardware-Optimized Ziggurat Algorithm for High-Speed Gaussian Random Number Generators. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Toomas P. Plaks (eds.) |
Proceedings of the 2009 International Conference on Engineering of Reconfigurable Systems & Algorithms, ERSA 2009, July 13-16, 2009, Las Vegas Nevada, USA |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Jean-Philippe Diguet, Linfeng Ye, Yvan Eustache, Jérémie Crenne, Pierre Bomel, Guy Gogniat, Jorgiano Vidal, Florent de Lamotte |
Networked Self-adaptive Systems: An Opportunity for Configuring in the Large. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Ray Bittner |
The Speedy DDR2 Controller For FPGAs. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Takayuki Mabuchi, Kenji Miyashiro, Minoru Watanabe, Akifumi Ogiwara |
Optically Reconfigurable Gate Array with a One-Time Writable Holographic Memory. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Yosuke Kawanaka, Shin'ichi Wakabayashi, Shinobu Nagayama |
A Systolic String Matching Algorithm for High-Speed Recognition of a Restricted Regular Set. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Sumedha Gupta Kodipyaka, Jooheung Lee |
A Scalable H.264/AVC Variable Block Size Motion Estimation Engine Using Partial Reconfiguration. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Fernando Rincón, Julio Dondo, Jesús Barba, Francisco Moya, Juan Carlos López 0001 |
Supporting Operating Systems for Reconfigurable Computing: A Distributed Service Oriented Approach. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Abderrahmane Bennis, Miriam Leeser, Gilead Tadmor |
The Effect of Parameterization on a Reconfigurable Implementation of PIV. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Luke Terry, Vladimir Roitch, Shoeb Tufail, Kirit Singh, Omair Taraq, Wayne Luk, Peter Jamieson |
Harnessing Human Computation Cycles for the FPGA Placement Problem. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Akira Yamawaki 0002, Seiichi Serikawa, Masahiko Iwane |
An Efficient Comparative Evaluation to Buffering Methods for Window-based Image Processing Using Semi-programmable Hardware. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Paolo Roberto Grassi, Marco D. Santambrogio, Jens Hagemeyer, Christopher Pohl, Mario Porrmann |
SiLLis: A Simplified Language for Monitoring and Debugging of Reconfigurable Systems. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Weisheng Zhao, Christian Gamrat, Yves Lhuillier |
Nanocomputing Block based Multi-Context FPGA. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Santos López-Estrada, René Cumplido |
FPGA-architecture for Knowledge-Based Target Detection in Radar Signal Processing. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Jorge Ortiz 0002 |
Area Evaluation for Parallel Execution in Reconfigurable Processor Architectures. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Masanori Hariyama, Keita Tanji, Michitaka Kameyama |
FPGA Implementation of a High-Speed Stereo Matching Processor Based on Recursive Computation. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Sébastien Pillement, Daniel Chillet, Yaset Oliva, Jean-Christophe Prévotet |
High-Level Exploration for Dynamic Reconfiguration Management. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Andrea Suardi, Antonio Manenti, Andrea Abba, Angelo Geraci |
High-efficiency FPGA Fully-Based Implementation of the Conjugate Gradient Method. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Kylan Robinson, José G. Delgado-Frias |
Fault Avoidance in Medium-Grain Reconfigurable Hardware Architectures. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Gilles Sassatelli |
Bio-inspired Systems: Self-adaptability from Chips to Sensor-network Architectures. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Craig Moore, Harald Devos, Dirk Stroobandt |
Optimizing the FPGA Memory Design for a Sobel Edge Detector. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Toru Sano, Yoshiki Saito, Hideharu Amano |
Configuration with Self-Configured Datapath: A High Speed Configuration Method for Dynamically Reconfigurable Processors. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Qian Ding, William Robinson |
An FPGA Implementation of an Elliptic Curve Cryptosystem Coprocessor over Prime Fields. |
ERSA |
2009 |
DBLP BibTeX RDF |
|
| 1 | Jian Huang, Matthew Parris, Jooheung Lee, Ronald F. DeMara |
Scalable FPGA Architecture for DCT Computation Using Dynamic Partial Reconfiguration. |
ERSA |
2008 |
DBLP BibTeX RDF |
|
| 1 | Edgar Ferrer, Dorothy Bollman |
A New Efficient Architecture for Univariate Polynomial Interpolation Over GF(2m). |
ERSA |
2008 |
DBLP BibTeX RDF |
|
| 1 | Brent E. Nelson, Michael J. Wirthlin, Brad L. Hutchings, Peter M. Athanas, Shawn A. Bohner |
Design Productivity for Configurable Computing. |
ERSA |
2008 |
DBLP BibTeX RDF |
|
| 1 | Mariam Hoseini, Chao You, Mark Pavicic |
A Cellular Automata ASIC for Conformal Computing. |
ERSA |
2008 |
DBLP BibTeX RDF |
|
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