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Results
Found 19 publication records. Showing 19 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
1 | Alain Girault, Robert de Simone (eds.) |
Proceedings of the Third International Workshop on Formal Methods for Globally Asynchronous Locally Synchronous Design, FMGALS@MEMOCODE 2007, Nice, France, May 29, 2007 |
FMGALS@MEMOCODE |
2008 |
DBLP BibTeX RDF |
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1 | JunBok You, Yang Xu 0036, Hosuk Han, Kenneth S. Stevens |
Performance Evaluation of Elastic GALS Interfaces and Network Fabric. |
FMGALS@MEMOCODE |
2007 |
DBLP DOI BibTeX RDF |
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1 | Julien Ouy, Jean-Pierre Talpin, Loïc Besnard, Paul Le Guernic |
Separate Compilation of Polychronous Specifications. |
FMGALS@MEMOCODE |
2007 |
DBLP DOI BibTeX RDF |
|
1 | Alain Girault, Robert de Simone |
Preface. |
FMGALS@MEMOCODE |
2007 |
DBLP DOI BibTeX RDF |
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1 | Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla |
Dataflow Architectures for GALS. |
FMGALS@MEMOCODE |
2007 |
DBLP DOI BibTeX RDF |
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1 | Daniel Gebhardt, Kenneth S. Stevens |
Elastic Flow in an Application Specific Network-on-Chip. |
FMGALS@MEMOCODE |
2007 |
DBLP DOI BibTeX RDF |
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1 | Julien Boucaron, Jean-Vivien Millo |
Compositionality of Statically Scheduled IP. |
FMGALS@MEMOCODE |
2007 |
DBLP DOI BibTeX RDF |
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1 | Montek Singh, Jean-Pierre Talpin (eds.) |
Proceedings of the Second Workshop on Globally Asynchronous, Locally Synchronous Design, FMGALS@MEMOCODE 2005, Verona, Italy, July 15, 2005 |
FMGALS@MEMOCODE |
2006 |
DBLP BibTeX RDF |
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1 | Sohini Dasgupta, Dumitru Potop-Butucaru, Benoît Caillaud, Alexandre Yakovlev |
Moving from Weakly Endochronous Systems to Delay-Insensitive Circuits. |
FMGALS@MEMOCODE |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Ankur Agiwal, Montek Singh |
Multi-Clock Latency-Insensitive Architecture and Wrapper Synthesis. |
FMGALS@MEMOCODE |
2005 |
DBLP DOI BibTeX RDF |
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1 | Frederic Doucet, Massimiliano Menarini, Ingolf H. Krüger, Rajesh K. Gupta 0001, Jean-Pierre Talpin |
A Verification Approach for GALS Integration of Synchronous Components. |
FMGALS@MEMOCODE |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Julien Ouy |
A Survey of Desynchronization in a Polychronous Model of Computation. |
FMGALS@MEMOCODE |
2005 |
DBLP DOI BibTeX RDF |
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1 | Frank K. Gürkaynak, Stephan Oetiker, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner |
Design Challenges for a Differential-Power-Analysis Aware GALS-based AES Crypto ASIC. |
FMGALS@MEMOCODE |
2005 |
DBLP DOI BibTeX RDF |
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1 | Luca P. Carloni |
The Role of Back-Pressure in Implementing Latency-Insensitive Systems. |
FMGALS@MEMOCODE |
2005 |
DBLP DOI BibTeX RDF |
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1 | Julien Boucaron, Jean-Vivien Millo, Robert de Simone |
Another Glance at Relay Stations in Latency-Insensitive Design. |
FMGALS@MEMOCODE |
2005 |
DBLP DOI BibTeX RDF |
|
1 | Ken S. Stevens, Sandeep K. Shukla, Montek Singh, Jean-Pierre Talpin |
Preface. |
FMGALS@MEMOCODE |
2005 |
DBLP DOI BibTeX RDF |
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1 | Xu Wang 0001, Marta Z. Kwiatkowska, Georgios Theodoropoulos 0001, Qianyi Zhang |
Opportunities and Challenges in Process-algebraic Verification of Asynchronous Circuit Designs. |
FMGALS@MEMOCODE |
2005 |
DBLP DOI BibTeX RDF |
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1 | David S. Bormann |
GALS Test Chip on 130nm Process. |
FMGALS@MEMOCODE |
2005 |
DBLP DOI BibTeX RDF |
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1 | Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla, David Berner, Jean-Pierre Talpin |
A Functional Programming Framework for Latency Insensitive Protocol Validation. |
FMGALS@MEMOCODE |
2005 |
DBLP DOI BibTeX RDF |
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