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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 1086 occurrences of 496 keywords
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Results
Found 1618 publication records. Showing 1618 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
1 | Mahdi Abbaszadeh, Dana L. How |
From Topology to Realization in FPGA/VPR Routing. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Louis-Noël Pouchet, Emily Tucker, Niansong Zhang, Hongzheng Chen, Debjit Pal, Gabriel Rodríguez 0001, Zhiru Zhang |
Formal Verification of Source-to-Source Transformations for HLS. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Shaoxian Xu, Sitong Lu, Zhiyuan Shao, Xiaofei Liao, Hai Jin 0001 |
MiCache: An MSHR-inclusive Non-blocking Cache Design for FPGAs. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Hongzheng Chen, Jiahao Zhang, Yixiao Du, Shaojie Xiang, Zichao Yue, Niansong Zhang, Yaohui Cai, Zhiru Zhang |
A Comprehensive Evaluation of FPGA-Based Spatial Acceleration of LLMs. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Greg Stitt, Wesley Piard, Christopher Crary |
Low-Latency, Line-Rate Variable-Length Field Parsing for 100+ Gb/s Ethernet. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Zhigang Wei, Aman Arora, Emily Shriver, Lizy Kurian John |
Cross-FPGA Power Estimation from High Level Synthesis via Transfer-Learning. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Jiahui Xu, Lana Josipovic |
Suppressing Spurious Dynamism of Dataflow Circuits via Latency and Occupancy Balancing. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Xiaoyu Niu, Yanjun Zhang, Yifan Zhang, Hongzheng Tian, Bo Yu 0014, Shaoshan Liu, Sitao Huang |
Accelerating Autonomous Path Planning on FPGAs with Sparsity-Aware HW/SW Co-Optimizations. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Youwei Xiao, Zizhang Luo, Kexing Zhou, Yun Liang 0001 |
Cement: Streamlining FPGA Hardware Design with Cycle-Deterministic eHDL and Synthesis. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Dongjoon Park, André DeHon |
REFINE: Runtime Execution Feedback for INcremental Evolution on FPGA Designs. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Shulin Zeng, Jun Liu, Guohao Dai, Xinhao Yang, Tianyu Fu 0004, Hongyi Wang, Wenheng Ma, Hanbo Sun, Shiyao Li, Zixiao Huang, Yadong Dai, Jintao Li, Zehao Wang, Ruoyu Zhang, Kairui Wen, Xuefei Ning, Yu Wang |
FlightLLM: Efficient Large Language Model Inference with a Complete Mapping Flow on FPGAs. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Thore Gerlach, Stefan Knipp, David Biesner, Stelios Emmanouilidis, Klaus Hauber, Nico Piatkowski |
FPGA-Placement via Quantum Annealing. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Timothy Sherwood |
Security, Synapses, Sustainability, and Superconducting: A Look at Possible Futures for the FPGA. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Andy Ray, Benjamin Devlin, Fu Yong Quah, Rahul Yesantharao |
Hardcaml: An OCaml Hardware Domain-Specific Language for Efficient and Robust Design. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Prabhat K. Gupta |
My Fifteen Year Journey of Deploying FPGA Accelerated Solutions. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Hui Wei 0001, Jingyong Ye, Yutong Chen, Heng Wu |
Design and Implementation of a Primary Visual Cortex Pathway Model Based on Opponent-process Theory. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Zhenyu Xu, Miaoxiang Yu, Jillian Cai, Saddam Gafsi, Judson Douglas Ryckman, Qing Yang 0001, Tao Wei |
An FPGA-Enabled Framework for Rapid Automated Design of Photonic Integrated Circuits. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Will Lin, Yizhou Shan, Ryan Kosta, Arvind Krishnamurthy, Yiying Zhang 0005 |
SuperNIC: An FPGA-Based, Cloud-Oriented SmartNIC. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Qizhe Wu, Letian Zhao, Yuchen Gui, Huawen Liang, Xiaotian Wang, Xi Jin 0002 |
Efficient Message Passing Architecture for GCN Training on HBM-based FPGAs with Orthogonal Topology On-Chip Networks. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Muhammed Kawser Ahmed, Christophe Bobda |
ISO-TENANT: Rethinking FPGA Power Distribution Network (PDN): A Hardware Based Solution for Remote Power Side Channel Attacks in FPGA. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Manoj B. Rajashekar, Xingyu Tian, Zhenman Fang |
HiSpMV: Hybrid Row Distribution and Vector Buffering for Imbalanced SpMV Acceleration on FPGAs. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Geng Yang, Jie Lei 0001, Zhenman Fang, Jiaqing Zhang, Junrong Zhang, Weiying Xie, Yunsong Li |
E4SA: An Ultra-Efficient Systolic Array Architecture for 4-Bit Convolutional Neural Networks. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Zhiru Zhang, Andrew Putnam (eds.) |
Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2024, Monterey, CA, USA, March 3-5, 2024 |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Yan Chen, Kiyofumi Tanaka |
A Flexible, Fast, Low Bandwidth Block-based Acceleration Architecture for CNN Inference on FPGAs. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Zifan He, Linghao Song, Robert F. Lucas, Jason Cong |
LevelST: Stream-based Accelerator for Sparse Triangular Solver. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Xiaochen Hao, Hongbo Rong, Mingzhe Zhang, Ce Sun, Hong H. Jiang, Yun Liang 0001 |
POPA: Expressing High and Portable Performance across Spatial and Vector Architectures for Tensor Computations. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Sahand Kashani, Mahyar Emami, Keisuke Kamahori, Mohammad Sepehr Pourghannad, Ritik Raj, James R. Larus |
A 475 MHz Manycore FPGA Accelerator for RTL Simulation. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Jinming Zhuang, Zhuoping Yang, Shixin Ji, Heng Huang, Alex K. Jones, Jingtong Hu, Yiyu Shi 0001, Peipei Zhou 0001 |
SSR: Spatial Sequential Hybrid Architecture for Latency Throughput Tradeoff in Transformer Acceleration. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Hassan Nassar, Philipp Machauer, Dennis R. E. Gnad, Lars Bauer, Mehdi B. Tahoori, Jörg Henkel |
Covert-Hammer: Coordinating Power-Hammering on Multi-tenant FPGAs via Covert Channels. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Yiyue Jiang, Andrius Vaicaitis, John Dooley, Miriam Leeser |
Efficient Neural Networks on the Edge with FPGAs by Optimizing an Adaptive Activation Function. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Martin Langhammer, George A. Constantinides |
A Statically and Dynamically Scalable Soft GPGPU. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Andy Ray, Benjamin Devlin, Fu Yong Quah, Rahul Yesantharao |
Hardcaml MSM: A High-Performance Split CPU-FPGA Multi-Scalar Multiplication Engine. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Yizhao Gao, Baoheng Zhang, Yuhao Ding, Hayden Kwok-Hay So |
A Composable Dynamic Sparse Dataflow Architecture for Efficient Event-based Vision Processing on FPGA. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Mark Klaisoongnoen, Nick Brown 0002, Tim Dykes, Jessica R. Jones, Utz-Uwe Haus |
Evaluating Versal AI Engines for Option Price Discovery in Market Risk Analysis. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Shengjun Xu, Wenlu Peng, Wenjin Huang, Qi Liu, Yihua Huang 0005 |
HR-GCN: An Efficient GCN Accelerator for Heterogeneous Graph Data and R-GCN Model. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Ayatallah Elakhras, Andrea Guerrieri, Lana Josipovic, Paolo Ienne |
Survival of the Fastest: Enabling More Out-of-Order Execution in Dataflow Circuits. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Stéphane Pouget, Louis-Noël Pouchet, Jason Cong |
Automatic Hardware Pragma Insertion in High-Level Synthesis: A Non-Linear Programming Approach. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Chunyou Su, Linfeng Du, Tingyuan Liang, Zhe Lin, Maolin Wang, Sharad Sinha, Wei Zhang 0012 |
GraFlex: Flexible Graph Processing on FPGAs through Customized Scalable Interconnection Network. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Ruifan Xu, Jin Luo, Yun Liang 0001 |
Hermes: Enhancing Extensibility in High-Level Synthesis through Multi-Level IRs. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Kai Qian, Zheng Liu, Yinqiu Liu, Haodong Lu 0001, Zexu Zhang, Ruiqiu Chen, Kun Wang 0005 |
AutoHammer: Breaking the Compilation Wall Between Deep Neural Network and Overlay-based FPGA Accelerator. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Daniel Gerlinghoff, Benjamin Chen Ming Choong, Rick Siow Mong Goh, Weng-Fai Wong, Tao Luo 0014 |
Table-Lookup MAC: Scalable Processing of Quantised Neural Networks in FPGA Soft Logic. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Andrea Guerrieri, Srijeet Guha, Lana Josipovic, Paolo Ienne |
DynaRapid: From C to FPGA in a Few Seconds. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Zelin Wang, Guiyuan Zhu, Yunhai Liu, Yisong Chang, Ke Zhang 0017, Mingyu Chen 0001 |
XUNI: Virtual Machine Abstraction for Self-contained and Multi-tenant Cloud FPGAs. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Alireza Khataei, Kia Bazargan |
CompressedLUT: An Open Source Tool for Lossless Compression of Lookup Tables for Function Evaluation and Beyond. |
FPGA |
2024 |
DBLP DOI BibTeX RDF |
|
1 | Saman P. Amarasinghe |
Compiler Support for Structured Data. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Wole Jaiyeoba, Nima Elyasi, Changho Choi, Kevin Skadron |
ACTS: A Near-Memory FPGA Graph Processing Framework. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Jiahui Xu, Emmet Murphy, Jordi Cortadella, Lana Josipovic |
Eliminating Excessive Dynamism of Dataflow Circuits Using Model Checking. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Kan Shi, Shuoxiang Xu, Yuhan Diao, David Boland, Yungang Bao |
ENCORE: Efficient Architecture Verification Framework with FPGA Acceleration. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Tim Oberschulte, Jakob Marten, Holger Blume |
Fault Detection on Multi COTS FPGA Systems for Physics Experiments on the International Space Station. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Linus Y. Wong, Jialiang Zhang, Jing Jane Li |
DONGLE: Direct FPGA-Orchestrated NVMe Storage for HLS. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Shashwat Shrivastava, Stefan Nikolic 0001, Chirag Ravishankar, Dinesh Gaitonde, Mirjana Stojilovic |
Mitigating the Last-Mile Bottleneck: A Two-Step Approach For Faster Commercial FPGA Routing. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Michael Lo, Young-kyu Choi, Weikang Qiao, Mau-Chung Frank Chang, Jason Cong |
HMLib: Efficient Data Transfer for HLS Using Host Memory. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Emanuele Del Sozzo, Davide Conficconi, Marco D. Santambrogio, Kentaro Sano |
Senju: A Framework for the Design of Highly Parallel FPGA-based Iterative Stencil Loop Accelerators. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Jonathan W. Greene |
FPGA Mux Usage and Routability Estimates without Explicit Routing. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Nick Brown 0002 |
Exploring the Versal AI Engines for Accelerating Stencil-based Atmospheric Advection Simulation. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Jinfeng Li, Yahong Rosa Zheng |
FPGA Acceleration for Successive Interference Cancellation in Severe Multipath Acoustic Communication Channels. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Ayatallah Elakhras, Riya Sawhney, Andrea Guerrieri, Lana Josipovic, Paolo Ienne |
Straight to the Queue: Fast Load-Store Queue Allocation in Dataflow Circuits. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Mingqiang Huang, Yucen Liu, Sixiao Huang, Kai Li, Qiuping Wu, Hao Yu 0001 |
Multi-bit-width CNN Accelerator with Systolic-in-Systolic Dataflow and Single DSP Multiple Multiplication Scheme. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Longfei Fan, Chang Wu |
FPGA Technology Mapping with Adaptive Gate Decomposition. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Chaoqiang Liu, Haifeng Liu 0003, Long Zheng 0003, Yu Huang 0013, Xiangyu Ye, Xiaofei Liao, Hai Jin 0001 |
FNNG: A High-Performance FPGA-based Accelerator for K-Nearest Neighbor Graph Construction. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Lei Cai, Jing Wang, Lianfeng Yu, Bonan Yan, Yaoyu Tao, Yuchao Yang |
Accelerating Neural-ODE Inference on FPGAs with Two-Stage Structured Pruning and History-based Stepsize Search. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Kaveh Aasaraai, Emanuele Cesena, Rahul Maganti, Nicolas Stalder, Javier Varela, Kevin Bowers |
Cyclone-NTT: An NTT/FFT Architecture Using Quasi-Streaming of Large Datasets on DDR- and HBM-based FPGA Platforms. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Dana How, Tim Ansell, Vaughn Betz, Chris Lavin, Ted Speers, Pierre-Emmanuel Gaillardon |
Open-source and FPGAs: Hardware, Software, Both or None? |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Ruiqi Chen, Haoyang Zhang, Yuhanxiao Ma, Enhao Tang, Shun Li, Yanxiang Zhu, Jun Yu 0010, Kun Wang 0005 |
Graph-OPU: An FPGA-Based Overlay Processor for Graph Neural Networks. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Zhenyu Xu, Miaoxiang Yu, Qing Yang 0001, Yeonho Jeong, Tao Wei |
A Novel FPGA Simulator Accelerating Reinforcement Learning-Based Design of Power Converters. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Jaideep Dastidar |
FPGAs and Their Evolving Role in Domain Specific Architectures: A Case Study of the AMD 400G Adaptive SmartNIC/DPU SoC. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Jinming Zhuang, Jason Lau, Hanchen Ye, Zhuoping Yang, Yubo Du, Jack Lo, Kristof Denolf, Stephen Neuendorffer, Alex K. Jones, Jingtong Hu, Deming Chen, Jason Cong, Peipei Zhou 0001 |
CHARM: Composing Heterogeneous AcceleRators for Matrix Multiply on Versal ACAP Architecture. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Alireza Khataei, Gaurav Singh, Kia Bazargan |
Approximate Hybrid Binary-Unary Computing with Applications in BERT Language Model and Image Processing. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Bharat Sukhwani, Mohit Kapur, Alda Ohmacht, Liran Schour, Martin Ohmacht, Chris Ward, Chuck Haymes, Sameh W. Asaad |
Janus: An Experimental Reconfigurable SmartNIC with P4 Programmability and SDN Isolation. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Sergey Gribok, Bogdan Pasca 0001, Martin Langhammer |
CSAIL2019 Crypto-Puzzle Solver Architecture. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Dimitrios Gourounas, Bagus Hanindhito, Arash Fathi, Dimitar Trenev, Lizy Kurian John, Andreas Gerstlauer |
LAWS: Large-Scale Accelerated Wave Simulations on FPGAs. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Saya Inagaki, Mingyu Yang, Yang Li 0001, Kazuo Sakiyama, Yuko Hara-Azumi |
Power Side-channel Countermeasures for ARX Ciphers using High-level Synthesis. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Sergiu Mosanu, Joshua Fixelle, Kevin Skadron, Mircea Stan |
FreezeTime: Towards System Emulation through Architectural Virtualization. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Vishak Narayanan, Rohit Sahu, Jidong Sun, Henry Duwe |
BOBBER A Prototyping Platform for Batteryless Intermittent Accelerators. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Rakin Muhammad Shadab, Yu Zou, Sanjay Gandham, Mingjie Lin |
OMT: A Demand-Adaptive, Hardware-Targeted Bonsai Merkle Tree Framework for Embedded Heterogeneous Memory Platform. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Mehdi Moghaddamfar, Norman May, Christian Färber, Wolfgang Lehner, Akash Kumar 0001 |
A Study of Early Aggregation in Database Query Processing on FPGAs. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Colin Drewes, Olivia Weng, Keegan Ryan, Bill Hunter, Christopher McCarty, Ryan Kastner, Dustin Richmond |
Turn on, Tune in, Listen up: Maximizing Side-Channel Recovery in Time-to-Digital Converters. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Linfeng Du, Tingyuan Liang, Sharad Sinha, Zhiyao Xie, Wei Zhang 0012 |
FADO: Floorplan-Aware Directive Optimization for High-Level Synthesis Designs on Multi-Die FPGAs. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Andrew David Gunter, Steven J. E. Wilton |
Towards a Machine Learning Approach to Predicting the Difficulty of FPGA Routing Problems. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Paolo Ienne, Zhiru Zhang (eds.) |
Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2023, Monterey, CA, USA, February 12-14, 2023 |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Stefan Nikolic 0001, Paolo Ienne |
Regularity Matters: Designing Practical FPGA Switch-Blocks. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Yuan Meng, Rajgopal Kannan, Viktor K. Prasanna |
A Framework for Monte-Carlo Tree Search on CPU-FPGA Heterogeneous Platform via on-chip Dynamic Tree Management. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Zachary Susskind, Aman Arora, Alan T. L. Bacellar, Diego Leonel Cadette Dutra, Igor D. S. Miranda, Maurício Breternitz, Priscila M. V. Lima, Felipe M. G. França, Lizy K. John |
An FPGA-Based Weightless Neural Network for Edge Network Intrusion Detection. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Sasindu Wijeratne, Ta-Yang Wang, Rajgopal Kannan, Viktor K. Prasanna |
Accelerating Sparse MTTKRP for Tensor Decomposition on FPGA. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Chuliang Guo, Binglei Lou, Xueyuan Liu, David Boland, Philip H. W. Leong |
Single-Batch CNN Training using Block Minifloats on FPGAs. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Hyeong-Ju Kang |
AoCStream: All-on-Chip CNN Accelerator With Stream-Based Line-Buffer Architecture. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Xuan Wang, Lei Gong, Jing Cao, Wenqi Lou, Weiya Wang, Chao Wang 0003, Xuehai Zhou |
hAP: A Spatial-von Neumann Heterogeneous Automata Processor with Optimized Resource and IO Overhead on FPGA. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Meghna Mandava, Deming Chen |
Nimblock: Scheduling for Fine-grained FPGA Sharing through Virtualization. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Lin Shu, Long Xiao, Yafang Song, Qiuxiang Fan, Guitian Fang, Jie Hao |
A Fractal Astronomical Correlator Based on FPGA Cluster with Scalability. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Yongzheng Chen, Gang Wu 0007 |
A Flexible Toolflow for Mapping CNN Models to High Performance FPGA-based Accelerators. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Olivia Weng, Gabriel Marcano, Vladimir Loncar, Alireza Khodamoradi, Nojan Sheybani, Farinaz Koushanfar, Kristof Denolf, Javier Mauricio Duarte, Ryan Kastner |
Adapting Skip Connections for Resource-Efficient FPGA Inference. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Ross Martin |
An Efficient High-Speed FFT Implementation. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Andrew Elbert Wilson, Nathan Baker, Ethan Campbell, Jackson Sahleen, Michael J. Wirthlin |
Post-Radiation Fault Analysis of a High Reliability FPGA Linux SoC. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Tuo Dai, Bizhao Shi, Guojie Luo |
Weave: Abstraction for Accelerator Integration of Generated Modules. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Linghao Song, Licheng Guo, Suhail Basalama, Yuze Chi, Robert F. Lucas, Jason Cong |
Callipepla: Stream Centric Instruction Set and Mixed Precision for Accelerating Conjugate Gradient Solver. |
FPGA |
2023 |
DBLP DOI BibTeX RDF |
|
1 | Yanqi Liu, Anthony Opipari, Théo Guérin, Ruth Iris Bahar |
Hardware Acceleration of Nonparametric Belief Propagation for Efficient Robot Manipulation. |
FPGA |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Satnam Singh |
The Virtuous Cycles of Determinism: Programming Groq's Tensor Streaming Processor. |
FPGA |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Yue Zha, Jing Li 0073 |
Revisiting PathFinder Routing Algorithm. |
FPGA |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Mengshu Sun, Zhengang Li, Alec Lu, Yanyu Li, Sung-En Chang, Xiaolong Ma, Xue Lin, Zhenman Fang |
FILM-QNN: Efficient FPGA Acceleration of Deep Neural Networks with Intra-Layer, Mixed-Precision Quantization. |
FPGA |
2022 |
DBLP DOI BibTeX RDF |
|
1 | Aman Arora, Aatman Borda, Tanmay Anand, Bagus Hanindhito, Lizy K. John |
MathRAMs: Configurable Fused Compute-Memory Blocks for FPGAs. |
FPGA |
2022 |
DBLP DOI BibTeX RDF |
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