Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
1 | Philip M. Lewis II, Richard Edwin Stearns, Juris Hartmanis |
Memory bounds for recognition of context-free and context-sensitive languages |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | B. R. S. Buckingham, William C. Carter, W. R. Crawford, G. A. Nowell |
The controls automation system |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Zvi Kohavi, Edward J. Smith |
Decomposition of sequential machines |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Janusz A. Brzozowski |
On single-loop realizations of automata |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Yehoshafat Give'on |
Transparent categories and categories of transition systems |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Richard Edwin Stearns, Juris Hartmanis, Philip M. Lewis II |
Hierarchies of memory limited computations |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | F. J. Hackl, R. W. Shirk |
An integrated approach to automated computer maintenance |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | F. C. Hennie |
Crossing sequences and off-line Turing machine computations |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | James F. Gimpel |
The synthesis of TANT networks |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Seymour Ginsburg, Sheila A. Greibach |
Deterministic context free languages |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | |
6th Annual Symposium on Switching Circuit Theory and Logical Design, Ann Arbor, Michigan, USA, October 6-8, 1965 |
SWCT |
1965 |
DBLP BibTeX RDF |
|
1 | I. Terris, Michel A. Melkanoff |
Investigation and simulation of a self-repairing digital computer |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | S. S. Ruby, Patrick C. Fischer |
Translational methods and computational complexity |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | C. V. Ramamoorthy |
Procedures for minimization of "exclusive-OR" and "logical-equivalence" switching circuits. |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Marion Dunning, Bernard Kolman |
Reliability and fault-masking in n-variable NOR trees |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Edward W. Veitch |
A proof concerning infinite nets of logic elements without feedback |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | R. Gonzalez, Eugene L. Lawler |
Two-level threshold minimization |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Arnold L. Rosenberg |
On multi-head finite automata |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Arthur D. Friedman |
Feedback in asynchronous sequential circuits |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Parker W. Snapp |
Holiac-A family of student-constructed logic teaching aids |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | C. L. Coates, Vatana Supornpaibul |
On maximum stability realizations of linearly separable Boolean functions |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Herschel H. Loomis Jr., Michael R. McCoy |
A theory of high-speed clocked logic |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Wayne A. Davis |
On shift register realizations for sequential machines |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | H. Paul Zeiger |
Cascade synthesis of finite-state machines |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | A. J. Nichols III |
Modular synthesis of sequential machines |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Zamir Bavel, David E. Muller |
Reversibility in monadic algebras and automata |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | John N. Warfield |
Synthesis of switching circuits to yield prescribed probability relations |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Jack W. Carlyle |
State-calculable stochastic sequential machines, equivalences, and events |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Jürg Nievergelt |
Partially ordered classes of finite automata |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Eric G. Wagner |
On connecting modules together uniformly to form a modular computer |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Sze-Tsen Hu |
Minimal linear decompositions of switching functions |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Edward P. Stabler |
Threshold gate network synthesis |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Charles H. Gustafson, Donald R. Haring, Alfred K. Susskind, Thomas G. Wills-Sanford |
Synthesis of counters with threshold elements |
SWCT |
1965 |
DBLP DOI BibTeX RDF |
|
1 | Seymour Ginsburg, Edwin H. Spanier |
Mappings of languages by two-tape devices |
SWCT |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Thomas V. Griffiths |
Turing machine recognizers for general rewriting systems |
SWCT |
1964 |
DBLP DOI BibTeX RDF |
|
1 | J. F. Poage, Edward J. McCluskey |
Derivation of optimum test sequences for sequential machines |
SWCT |
1964 |
DBLP DOI BibTeX RDF |
|
1 | C. L. Liu 0001 |
Sequential-machine realization using feedback shift registers |
SWCT |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Juris Hartmanis, Richard Edwin Stearns |
Computational complexity of recursive sequences |
SWCT |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Richard Edwin Stearns, Juris Hartmanis |
On the application of pair algebra to automata theory |
SWCT |
1964 |
DBLP DOI BibTeX RDF |
|
1 | G. L. Hicks, Arthur J. Bernstein |
On the minimum stage realization of switching functions using logic gates with limited fan-in |
SWCT |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Wayne A. Davis, Janusz A. Brzozowski |
On the linearity of sequential machines |
SWCT |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Patrick C. Fischer |
On formalisms for Turing machines |
SWCT |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Jack Goldberg, Robert A. Short |
Antiparallel control logic |
SWCT |
1964 |
DBLP DOI BibTeX RDF |
|
1 | R. Stockton Gaines |
Implication techniques for Boolean functions |
SWCT |
1964 |
DBLP DOI BibTeX RDF |
|
1 | James F. Gimpel |
A reduction technique for prime implicant tables |
SWCT |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Zamir Bavel |
On the total length of an experiment, I |
SWCT |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Michael A. Harrison |
A census of finite automata (extended summary) |
SWCT |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Robert E. Swartwout |
New techniques for designing speed independent control logic |
SWCT |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Arthur J. Bernstein |
Reducing variable dependency in combinational circuits |
SWCT |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Sheldon B. Akers Jr. |
A diagrammatic approach to multi-level logic synthesis |
SWCT |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Donald L. Epley, P. T. Wang |
On state assignments and sequential machine decompositions from S. P. partitions |
SWCT |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Edward B. Eichelberger |
Hazard detection in combinational and sequential switching circuits |
SWCT |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Bernard Elspas |
Topological constraints on interconnection-limited logic |
SWCT |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Rocco H. Urbano |
Some new results on the analysis and reliability of large polyfunctional nets |
SWCT |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Milton W. Green |
A lower bound on Rado's sigma function for binary Turing machines |
SWCT |
1964 |
DBLP DOI BibTeX RDF |
|
1 | |
5th Annual Symposium on Switching Circuit Theory and Logical Design, Princeton, New Jersey, USA, November 11-13, 1964 |
SWCT |
1964 |
DBLP BibTeX RDF |
|
1 | F. C. Hennie |
Fault detecting experiments for sequential circuits |
SWCT |
1964 |
DBLP DOI BibTeX RDF |
|
1 | David G. Hammel |
Ideas on asynchronous feedback networks |
SWCT |
1964 |
DBLP DOI BibTeX RDF |
|
1 | Arnold L. Rosenberg |
On n-tape finite state acceptors |
SWCT |
1964 |
DBLP DOI BibTeX RDF |
|
1 | W. D. Frazer |
Bilateral threshold nets (extended summary) |
SWCT |
1963 |
DBLP DOI BibTeX RDF |
|
1 | Theodore M. Booth |
Demonstrating hazards in sequential relay circuits |
SWCT |
1963 |
DBLP DOI BibTeX RDF |
|
1 | Raymond E. Miller |
A survey of asynchronous logic: Comparing various definitions and models for asynchronous switching circuits |
SWCT |
1963 |
DBLP DOI BibTeX RDF |
|
1 | Richard F. Arnold, Eugene L. Lawler |
On the analysis of functional symmetry |
SWCT |
1963 |
DBLP DOI BibTeX RDF |
|
1 | Roger E. Levien |
Determining the best ordering of variables in cascade switching circuits |
SWCT |
1963 |
DBLP DOI BibTeX RDF |
|
1 | C. L. Coates, Philip M. Lewis II |
Threshold gate realizations of logical functions with don't cares |
SWCT |
1963 |
DBLP DOI BibTeX RDF |
|
1 | Edward J. McCluskey |
Logical design theory of NOR gate networks with no complemented inputs |
SWCT |
1963 |
DBLP DOI BibTeX RDF |
|
1 | Calvin C. Elgot, Jorge E. Mezei |
Two-sided finite-state transductions (abbreviated version) |
SWCT |
1963 |
DBLP DOI BibTeX RDF |
|
1 | Eugene L. Lawler |
The minimal synthesis of tree structures |
SWCT |
1963 |
DBLP DOI BibTeX RDF |
|
1 | Robert McNaughton |
Finite automata and badly timed elements |
SWCT |
1963 |
DBLP DOI BibTeX RDF |
|
1 | Patrick C. Fischer |
On computability by certain classes of restricted Turing machines |
SWCT |
1963 |
DBLP DOI BibTeX RDF |
|
1 | |
4th Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 28-30, 1963 |
SWCT |
1963 |
DBLP BibTeX RDF |
|
1 | David E. Muller |
Infinite sequences and finite machines |
SWCT |
1963 |
DBLP DOI BibTeX RDF |
|
1 | Edward B. Eichelberger |
Sequential circuit synthesis using input delays |
SWCT |
1963 |
DBLP DOI BibTeX RDF |
|
1 | Calvin C. Elgot, Joseph D. Rutledge |
Machine properties preserved under state minimization |
SWCT |
1962 |
DBLP DOI BibTeX RDF |
|
1 | Shmuel Winograd |
Bounded-transient automata |
SWCT |
1962 |
DBLP DOI BibTeX RDF |
|
1 | Edward J. McCluskey |
Reduction of feedback loops in sequential circuits and carry leads in iterative networks |
SWCT |
1962 |
DBLP DOI BibTeX RDF |
|
1 | Lorenzo Calabi, J. A. Riley |
The algebra of Boolean formulas: Some criteria for minimality |
SWCT |
1962 |
DBLP DOI BibTeX RDF |
|
1 | Franz E. Hohn |
States of sequential machines whose logical elements involve delay |
SWCT |
1962 |
DBLP DOI BibTeX RDF |
|
1 | Angelo Raffaele Meo |
On the minimal third order expression of a Boolean function |
SWCT |
1962 |
DBLP DOI BibTeX RDF |
|
1 | J. C. Beatty, Raymond E. Miller |
Some theorems for incompletely specified sequential machines with applications to state minimization |
SWCT |
1962 |
DBLP DOI BibTeX RDF |
|
1 | Sheldon B. Akers Jr. |
Synthesis of combinational logic using three-input majority gates |
SWCT |
1962 |
DBLP DOI BibTeX RDF |
|
1 | |
3rd Annual Symposium on Switching Circuit Theory and Logical Design, Chicago, Illinois, USA, October 7-12, 1962 |
SWCT |
1962 |
DBLP BibTeX RDF |
|
1 | Barrett Hazeltine |
A procedure for obtaining an economical asynchronous sequential circuit directly from a set of regular expressions |
SWCT |
1962 |
DBLP DOI BibTeX RDF |
|
1 | E. W. Samson, Lorenzo Calabi |
Research and algorithms in the theory of Boolean formulas |
SWCT |
1962 |
DBLP DOI BibTeX RDF |
|
1 | Chuen K. Tung |
On some transformation theorems in many-valued logical systems |
SWCT |
1962 |
DBLP DOI BibTeX RDF |
|
1 | Eugene L. Lawler |
Minimal Boolean expressions with more than two levels of sums and products |
SWCT |
1962 |
DBLP DOI BibTeX RDF |
|
1 | Saburo Muroga |
Generation of self-dual threshold functions and lower bounds of the number of threshold functions and a maximum weight |
SWCT |
1962 |
DBLP DOI BibTeX RDF |
|
1 | Philip M. Lewis II, C. L. Coates |
A realization procedure for threshold gate networks |
SWCT |
1962 |
DBLP DOI BibTeX RDF |
|
1 | Shimon Even |
Generalized automata and their information losslessness |
SWCT |
1962 |
DBLP DOI BibTeX RDF |
|
1 | Roger E. Levien |
The synthesis of cascade switching circuits |
SWCT |
1962 |
DBLP DOI BibTeX RDF |
|
1 | Robert E. Swartwout |
One method for designing speed independent logic for a control |
SWCT |
1961 |
DBLP DOI BibTeX RDF |
|
1 | Richard M. Karp, F. E. McFarlin, J. Paul Roth, J. R. Wilts |
A computer program for the synthesis of combinational switching circuits |
SWCT |
1961 |
DBLP DOI BibTeX RDF |
|
1 | Donald Kennedy |
The integrative properties of neurons |
SWCT |
1961 |
DBLP DOI BibTeX RDF |
|
1 | D. R. Boyle, Robert S. Ledley |
Multivalued logic devices for simulating threshold neurons |
SWCT |
1961 |
DBLP DOI BibTeX RDF |
|
1 | Calvin C. Elgot, Joseph D. Rutledge |
Operations of finite automata |
SWCT |
1961 |
DBLP DOI BibTeX RDF |
|
1 | S. Okada, K. P. Rajappan, K. P. Young |
Boolean two-terminal analysis and synthesis |
SWCT |
1961 |
DBLP DOI BibTeX RDF |
|
1 | Raymond E. Miller |
An introduction to speed independent circuit theory |
SWCT |
1961 |
DBLP DOI BibTeX RDF |
|
1 | William H. Kautz |
Automatic fault detection in combinational switching networks |
SWCT |
1961 |
DBLP DOI BibTeX RDF |
|
1 | Dean N. Arden |
Delayed-logic and finite-state machines |
SWCT |
1961 |
DBLP DOI BibTeX RDF |
|
1 | |
2nd Annual Symposium on Switching Circuit Theory and Logical Design, Detroit, Michigan, USA, October 17-20, 1961 |
SWCT |
1961 |
DBLP BibTeX RDF |
|