| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Ming-Nan Cheng |
AIoT Security - from the Perspective of a Microcontroller.  |
VLSI-DAT  |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Shao-Yu Shu, Chun-Hung Lin, Ching-Yuan Yang |
A 5-GHz Sub-Sampling Phase-Locked Loop With Pulse-Width to Current Conversion. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Mike Shuo-Wei Chen |
Non-Uniform Sampling Data Converters: A Journey to Uncharted Circuits and Systems. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Kung-Yen Lee |
The Applications of SiC Power Devices in Renewable Energy and EV. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | K. Lawrence Loh |
Technology Challenges to IC Industry for Next Decade. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Wei-Cheng Chou, Cheng-Wei Huang, Juinn-Dar Huang |
Hardware-Friendly Progressive Pruning Framework for CNN Model Compression using Universal Pattern Sets. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Pai-Yu Tan, Chih-Hsuan Tung, Cheng-Wen Wu, Mincent Lee, Gordon Liao |
A Memory Built-In Peer-Repair Architecture for Mesh-Connected Processor Array. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Kushagra Agarwal, Aryamaan Jain, Deepthi Amuru, Zia Abbas |
Fast and efficient ResNN and Genetic optimization for PVT aware performance enhancement in digital circuits. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Yi-Chieh Kao, Hung-An Chen, Hsi-Pin Ma |
An FPGA-Based High-Frequency Trading System for 10 Gigabit Ethernet with a Latency of 433 ns. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Pen-Jui Peng |
Design of ultra-high-speed Transmitters Beyond 100Gb/s in CMOS Technology. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | M. P. Pavan Kumar, Cheng-Jyun Tang, Kun-Chih Jimmy Chen |
Composite Fault Diagnosis of Rotating Machinery With Collaborative Learning. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Jen-Wei Liang |
Practical Considerations of In-Memory Computing in the Deep Learning Accelerator Applications. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuji Yano, Hisashi Iwamoto, Takuma Yoshimura, Yoshihiro Nishida, Tatsuya Mori, Kiyotaka Komoku, Hidekuni Takao, Kazutami Arimoto |
28-m W Fully Embedded AI Techniques with On-site Learning for Low-Power Handy Tactile Sensing System. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Hong-Hao Wang, Po-Yao Chuang, Cheng-Wen Wu |
A Thermal Quorum Sensing Scheme for Enhancement of Integrated-Circuit Reliability and Lifetime. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Kang-Yi Fan, Jyun-Hua Chen, Chien-Nan Liu, Juinn-Dar Huang |
Performance Optimization for MLP Accelerators using ILP-Based On-Chip Weight Allocation Strategy. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | I-Hsuan Wu, Ming-Dou Ker |
Single Chip of Electrostatic Discharge Detector for IC Manufacturing Field Control. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Zahra Heshmatpour, Lihong Zhang, Howard M. Heys |
Robust CNFET Circuit Sizing Optimization. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Sying-Jyan Wang, Yen-Chang Shih, Katherine Shu-Min Li, Chen-Yeh Lin, Song-Kong Chong |
Improving IJTAG Test Efficiency and Security. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Che-Chang Yang, Yung-Tai Shih, Chun-Chen Chen, Chih-Tsun Huang, Jing-Jia Liou, Yao-Hua Chen, Juin-Ming Lu |
Efficient Segment-wise Pruning for DCNN Inference Accelerators. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Youbiao He, Hebi Li, Jin Tian 0001, Forrest Sheng Bao |
Circuit Routing Using Monte Carlo Tree Search and Deep Reinforcement Learning. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Mitsuhisa Sato |
The Supercomputer "Fugaku". |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Zong-Hua Tsai, Aaron C.-W. Liang, Charles H.-P. Wen |
SlewFTA: Functional Timing Analysis Considering Slew Propagation. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Yi-Da Hsin, Yen-Shi Kuo, Bo-Cheng Lai |
Distributed Sorting Architecture on Multiple FPGA. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Chen-Yi Lee |
Bio-Chips for Fast Medial Tests Networks. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Yun-Shiang Shu |
Introduction of Noise-Shaping SAR ADCs. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Yoojin Ban |
Silicon Photonics for Scaling the Cloud and Enabling AI. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Youngcheol Chae |
Low-power Continuous-time Delta-sigma ADCs. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Vincent Hsu |
2.5D & 3DIC Advanced Packaging: An EDA Perspective. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Chong-Yin Lu, Ren-Song Tsay, Weyshin Chang |
An Embedded CNN Design for Edge Devices Based on Logarithmic Computing. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Takekazu Tabata |
A64FX: 52 Core Processor Designed for the Supercomputer Fugak. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhi-Heng Kang, Yu-Chi Yen, Guan-Yu Su, Shen-Iuan Liu |
An Adaptive Digital PLL Based on BBPFD Transition Probability. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Massimo Alioto |
Circuits and Architectures for Next-generation Attentive & Intelligent Systems. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Taisuke Boku |
How FPGA can contribute to HPC ? |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Ming-Wei Lin |
A Silicon Photonics Technology for 400 Gbit/s Applications. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Meng-Yi Wu |
Hardware Root-of-Trust Design Based on on-chip PUF for AIoT Applications. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Shien-Chun Luo, Kuo-Chiang Chang, Po-Wei Chen, Zhao-Hong Chen |
Configurable Deep Learning Accelerator with Bitwise-accurate Training and Verification. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | TaiKang Shing |
Wide Band Gap Devices for Power System. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | |
2022 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2022, Hsinchu, Taiwan, April 18-21, 2022 |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Wan-Ting Chang, Chih-Hung Kuo, Li-Chun Fang |
Variational Channel Distribution Pruning and Mixed-Precision Quantization for Neural Network Model Compression. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Chi Liu, Shao-Tzu Li, Tong-Lin Pan, Cheng-En Ni, Yun Sung, Chia-Lin Hu, Kang-Yu Chang, Tuo-Hung Hou, Tian-Sheuan Chang, Shyh-Jye Jou |
An 1-bit by 1-bit High Parallelism In-RRAM Macro with Co-Training Mechanism for DCNN Applications. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Tung-Yi Chan |
Challenges and Opportunities in Building Secure IoT Platforms. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Xingyu Wang, Ruilin Zhang, Yuxin Wang, Kunyang Liu, Xuanzhen Wang, Hirofumi Shinohara |
A 0.116pJ/bit Latch-Based True Random Number Generator with Static Inverter Selection and Noise Enhancement. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | L. C. Lu |
Semiconductor Evolution for Chip and System Design- From 2D Scaling to 3D Heterogeneous Integration. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Ching-Che Chung, Yi-Ting Tsai |
A Body Channel Communication Transceiver with a 16x Oversampling CDR and Convolutional Codes. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Boris Murmann |
Bridging the Physical and Digital Worlds in Data-Driven Systems. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Akhilesh Kumar, Norman Chang, David Geb, Haiyang He, Stephen H. Pan, Jimin Wen, Saeed Asgari, Mehdi Abarham, Chris Ortiz |
ML-based Fast On-Chip Transient Thermal Simulation for Heterogeneous 2.5D/3D IC Designs. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Chih-Wen Huang |
Product level design considerations and solutions for RF GaN applications. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Yen-Min Tseng, Yu-Chi Yen, Shen-Iuan Liu |
An Injection-Locked Clock Multiplier With Injection Strength Calibration. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Yeu-Haw Yeh, Simon Yi-Hung Chen, Hung-Ming Chen, Deng-Yao Tu, Guan-Qi Fang, Yun-Chih Kuo, Po-Yang Chen |
Substrate Signal Routing Solution Exploration for High-Density Packages with Machine Learning. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Yen-Po Lai, Hao-Hsuan Chang, Tai-Cheng Lee |
An Asynchronous Zero-Crossing-Based Incremental Delta-Sigma Converter. |
VLSI-DAT |
2022 |
DBLP DOI BibTeX RDF |
|
| 1 | Ying-Yao Huang, Chang-Tzu Lin, Wei-Lun Liang, Hung-Ming Chen |
Learning Based Placement Refinement to Reduce DRC Short Violations. |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Sying-Jyan Wang, Tzu-Heng Chang, Katherine Shu-Min Li |
Machine Learning Assisted Challenge Selection for Modeling Attack Resistance in Strong PUFs. |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Chia-Wei Kao, Che-Wei Hsu, Jia-Sheng Huang, Yu-Cheng Huang, Shih-Che Kuo, Chia-Hung Chen |
A 677-μW 90-dB DR 16-kHz BW Incremental ΔΣ ADC for Sensor Interfaces. |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Victor M. van Santen, Linda Schillinger, Hussam Amrouch |
Self-Heating Effects from Transistors to Gates. |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Ling-Yen Song, Chih-Shen Yeh, Chien-Nan Liu, Juinn-Dar Huang |
Storage-Aware Scheduling Algorithm for Reservoir Switching Minimization on Digital Microfluidic Biochips. |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Jie-Wei Lai |
Opportunity and Challenge of Chiplet-Based HPC and AIoT. |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Chang Hao, Xu Yong, Tianming Ni |
A Test Method for Large-size TSV Considering Resistive Open Fault and Leakage Fault Coexistence. |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | M. D. Arafat Kabir, Weishiun Hung, Tsung-Yi Ho, Yarui Peng |
Holistic and In-Context Design Flow for 2.5D Chiplet-Package Interaction Co-Optimization. |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Lih-Yih Chiou, Jing-Yu Huang, Chi-Kuan Li, Chen-Chung Tsai |
A Reliable Near-Threshold Voltage SRAM-Based PUF Utilizing Weight Detection Technique. |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Siya Bao, Masashi Tawada, Shu Tanaka, Nozomu Togawa |
An Approach to the Vehicle Routing Problem with Balanced Pick-up Using Ising Machines. |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | You-Xin Ling, Tsung-Heng Tsai |
A 6.78MHz Wireless Power Transfer System with Maximum Power Tracking over Wide Load Range. |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Guan-Yu Su, Zhi-Heng Kang, Shen-Iuan Liu |
An Adaptive Loop Gain Tracking Digital PLL Using Spectrum-Balancing Technique. |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Iris Hui-Ru Jiang, Yao-Wen Chang, Jiun-Lang Huang, Chung-Ping Chen |
Opportunities for 2.5/3D Heterogeneous SoC Integration. |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Min-Yan Su, Wei-Chen Lin, Yen-Ting Kuo, Chien-Mo James Li, Eric Jia-Wei Fang, Sung S.-Y. Hsueh |
Chip Performance Prediction Using Machine Learning Techniques. |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Yu-Hsien Lin, Chi Liu, Chia-Lin Hu, Kang-Yu Chang, Jia-Yin Chen, Shyh-Jye Jou |
A Reconfigurable In-SRAM Computing Architecture for DCNN Applications. |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Yu-Sheng Lin, Wei-Chao Chen, Trista Pei-Chun Chen |
Tensor-Centric Processor Architecture for Applications in Advanced Driver Assistance Systems. |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Chia-Ning Liu, Yu-An Lai, Chih-Hung Kuo, Shi-An Zhan |
Design of 2D Systolic Array Accelerator for Quantized Convolutional Neural Networks. |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo-En Chen, Bo-Yen Lin, Bo-Cheng Lai |
Reconfigurable Database Processor for Query Acceleration on FPGA. |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Matthias Eberlein, Harald Pretl |
A Compact Thermal Sensor with Duty-Cycle Modulation on 1200 µm2 in 7nm FinFET. |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Yen-Ting Chen, Mao-Ling Chiu, How-Wei Teng, Tsung-Hsien Lin |
A Hybrid Supply Modulator for 10-MHz LTE Power Amplifier with 17.3% PAE Improvement. |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Pin-Han Chen |
Intelligence Everywhere: The Challenges and Opportunities for Semiconductor Designs. |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | |
International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2021, Hsinchu, Taiwan, April 19-22, 2021 |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Tsung-Wei Huang |
Machine Learning System-Enabled GPU Acceleration for EDA. |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Yen-Min Tseng, Yu-Chi Yen, Shen-Iuan Liu |
A Digital Phase-Locked Loop With Background Supply Noise Cancellation. |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Hiroshi Doyu, Roberto Morabito, Martina Brachmann |
A TinyMLaaS Ecosystem for Machine Learning in IoT: Overview and Research Challenges. |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Kun-Chih Jimmy Chen, Chun-Chuan Wang, Cheng-Kang Tsai, Jing-Wen Liang |
Dynamic Mapping Mechanism to Compute DNN Models on a Resource-limited NoC Platform. |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Kun-Chih Jimmy Chen, Jing-Wen Liang, Yueh-Chi Yang, Hsiang-Ling Tai, Jo-Chiao Ku, Jui-Cheng Wang |
Embedded Bearing Fault Detection Platform Design for the Drivetrain System in the Future Industry 4.0 Era. |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Po-Hsin Lin, Chang-Lin Shih, Davy P. Y. Wong, Pai H. Chou |
Gait Parameters Analysis Based on Leg-and-shoe-mounted IMU and Deep Learning. |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Venkatesh G. Kadlimatti, Sumit Bhat |
Shutdown mode implementation for Boost and Inverting Buck-Boost converter. |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Samuel Liu, Jen-Ho Kuo, Luba Tang, Ning-Chi Huang, Der-Yu Tsai, M.-H. Yang, Kai-Chiang Wu |
ONNC Compiler Used in Fault-Mitigating Mechanisms Analysis on NVDLA-Based and ReRAM-Based Edge AI Chip Design. |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Han-Sheng Huang, Ming-Dou Ker |
Design of 2xVDD-Tolerant Power-Rail ESD Clamp Circuit Against False Trigger During Fast Power-ON Events. |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo-Wei Chen, Yung-Hui Chung, Chia-Ming Tsai |
An 8-Bit 1.25-GS/s 2.5-GHz ERBW Folding-Subrange ADC with Power-Efficient Metastability Error Reduction Technique. |
VLSI-DAT |
2021 |
DBLP DOI BibTeX RDF |
|
| 1 | Yi-Qi Lin, Andrew Patterson |
Design Solutions for 5G Power Amplifiers using 0.15μm and 0.25μm GaN HEMTs. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Chih-Hsiang Hsu, Shao-Yun Fang |
Stitch-Aware Routing Considering Smart Boundary for Multiple E-Beam Lithography. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Shyue-Kung Lu, Zeng-Long Tsai, Chun-Lung Hsu, Chi-Tien Sun |
Fault-Aware ECC Techniques for Reliability Enhancement of Flash Memory. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Tai-Chen Chen, Pei-Yu Lee, Tung-Chieh Chen |
Automatic Floorplanning for AI SoCs. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Cheng-Kuang C. K. Lee |
Deep Learning Creativity in EDA. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Herming Chiueh, Chia-Hsiang Yang, Charles H.-P. Wen, Chao-Guang Yang, Po-Hao Chien, Ching-Yang Hung, Yu-Jui Chen, Yao-Pin Wang, Chin-Fong Chiu, Jer Lin |
Radiation-Harden RISC Processor for Micro-Satellites in Standard CMOS. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Shen-Fu Hsiao, Yu-Hong Chen |
Flexible Multi-Precision Accelerator Design for Deep Convolutional Neural Networks Considering Both Data Computation and Communication. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhen-Cheng Zhang, Chun-Yuan Chiu, Hsiang-Cheng Yuan, Tsung-Hsien Lin |
A 0.5-V, 1.79-μW, 250-kbps Wake-up Receiver for IoT application in 90-nm CMOS. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Krishnendu Chakrabarty |
Hardware Trojan Detection at Run-time using Machine-Learning Techniques. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Po-Yu Li, Wei-En Lee, Ching-Tzung Lin, Li-Te Wu, Tsung-Hsien Lin |
A CMOS Temperature Sensor Based on a Chopped Continuous-Time Delta-Sigma Modulator. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Ming-Chia Chang, Min-Hsuan Wu, Shen-Iuan Liu |
A 500nW-50μ W Indoor Photovoltaic Energy Harvester with Multi-mode MPPT. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Kea-Tiong Tang |
Computing-In-Memory a Processing-In-Sensor Techniques for Low-Power Edge Devices. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Kai-Min Chang, Yen-Ju Lin, Chia-Liang Wei, Soon-Jyh Chang |
Resistor-Based Temperature Sensing Chip with Digital Output. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Chun-Yu Lin 0002, Tun-Ju Wang, Yu-Ting Hung, Tsung-Hsien Lin |
A 1-200MHz Multiple Output Fractional Divider Using Phase Rotating Technique. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Ming-Da Tsai, Song-Yu Yang, Chi-Yao Yu, Ping-Yu Chen, Tzung-Han Wu, Mohammed Hassan, Chi-Tsan Chen, Chao-Wei Wang, Yen-Chuan Huang, Li-Han Huang, Wei-Hao Chiu, Anson Lin, Bo-Yu Lin, Arnaud Werquin, Chien-Cheng Lin, Yen-Horng Chen, Jen-Che Tsai, Yuan-Yu Fu, Bernard Tenbroek, Chinq-Shiun Chiu, Yi-Bin Lee, Guang-Kaai Dehng |
RFIC and RF Module for 5G Applications. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Jerald Yoo |
Wearables to Electronics: The Key Enabler for Personalized Healthcare. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Koji Nii, Yasuhiro Taniguchi, Kosuke Okuyama |
A Cost-Effective Embedded Nonvolatile Memory with Scalable LEE Flash®-G2 SONOS for Secure IoT and Computing-in-Memory (CiM) Applications. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
| 1 | Yih Wang |
Memory for Data-Centric Computing: A Technology Perspective. |
VLSI-DAT |
2020 |
DBLP DOI BibTeX RDF |
|
![[Valid RSS]](Pics/valid-rss.png "Validate my RSS feed")
data released under the ODC-BY 1.0 license