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Found 343 publication records. Showing 343 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Kazuo Yano, Tomoaki Akitomi, Koji Ara, Jun-ichiro Watanabe, Satomi Tsuji, Nobuo Sato, Miki Hayakawa, Norihiko Moriwaki |
Profiting from IoT: The key is very-large-scale happiness integration.  |
VLSIC  |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Sohmyung Ha, Abraham Akinin, Jongkil Park, Chul Kim, Hui Wang 0023, Christoph Maier, Gert Cauwenberghs, Patrick P. Mercier |
A 16-channel wireless neural interfacing SoC with RF-powered energy-replenishing adiabatic stimulation. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Philippe Magarshack |
Breakthrough technologies and reference designs for new IoT applications. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhijie Chen, Masaya Miyahara, Akira Matsuzawa |
A 9.35-ENOB, 14.8 fJ/conv.-step fully-passive noise-shaping SAR ADC. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Yosuke Bando, Konosuke Watanabe, Ken-ichi Maeda, Hiroki Kudo, Masahiro Ishiyama, Atsushi Kunimatsu, Hiroto Nakai, Masafumi Takahashi, Yukihito Oowaki |
Caching mechanisms towards single-level storage systems for Internet of Things. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Gerard Villar Pique, Henk Jan Bergveld, Ravi Karadi |
A 1W 8-ratio switched-capacitor boost power converter in 140nm CMOS with 94.5% efficiency, 0.5mm thickness and 8.1mm2 PCB area. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Taewook Kim, Changsok Han, Nima Maghari |
A 7.2 mW 75.3 dB SNDR 10 MHz BW CT delta-sigma modulator using Gm-C-based noise-shaped quantizer and digital integrator. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Shang-Fu Yeh, Kuo-Yu Chou, Honyih Tu, Calvin Yi-Ping Chao, Fu-Lung Hsueh |
A 0.66e-rms temporal-readout-noise 3D-stacked CMOS image sensor with conditional correlated multiple sampling (CCMS) technique. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Seung Chul Song, J. Xu, N. N. Mojumder, K. Rim, D. Yang, Jerry Bao, J. Zhu, Joseph Wang, Mustafa Badaroglu, V. Machkaoutsan, P. Narayanasetti, B. Bucki, Jeff Fischer, Geoffrey Yeap |
Holistic technology optimization and key enablers for 7nm mobile SoC. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Yukio Hayakawa, Atsushi Himeno, Ryutaro Yasuhara, W. Boullart, E. Vecchio, T. Vandeweyer, T. Witters, D. Crotti, M. Jurczak, S. Fujii, S. Ito, Y. Kawashima, Yuuichirou Ikeda, Akifumi Kawahara, Ken Kawai, Zhiqiang Wei 0005, Shunsaku Muraoka, Kazuhiko Shimakawa, Takumi Mikawa, Shinichi Yoneda |
Highly reliable TaOx ReRAM with centralized filament for 28-nm embedded application. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Sung-Wan Hong, Gyu-Hyeong Cho |
7.4μW Ultra-high slew-rate pseudo single-stage amplifier driving 0.1-to-15nF capacitive load with >69° phase margin. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Sharvil Patil, Alin Ratiu, Dominique Morche, Yannis P. Tsividis |
A 3-10fJ/conv-step 0.0032mm2 error-shaping alias-free asynchronous ADC. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Dongjoo Shin, Injoon Hong, Gyeonghoon Kim, Hoi-Jun Yoo |
A 33 nJ/vector descriptor generation processor for low-power object recognition. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Chun C. Lee, Cho-Ying Lu, Ramya Narayanaswamy, Jad B. Rizk |
A 12b 70MS/s SAR ADC with digital startup calibration in 14nm CMOS. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Sebastian Loeda, Jeffrey Harrison, Franck Pourchet, Andrew Adams |
A 10/20/30/40 MHz feed-forward FIR DAC continuous-time ΔΣ ADC with robust blocker performance for radio receivers. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Makoto Ueki, K. Takeuchi, T. Yamamoto, Akira Tanabe, N. Ikarashi, M. Saitoh, T. Nagumo, Hiroshi Sunamura, Mitsuru Narihiro, Kazuya Uejima, Koji Masuzaki, Naoya Furutake, S. Saito, Y. Yabe, Akira Mitsuiki, Koichi Takeda, Takashi Hase, Yoshihiro Hayashi |
Low-power embedded ReRAM technology for IoT applications. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Chang-Kyo Lee, Min-Su Ahn, Daesik Moon, Kiho Kim, Yoon-Joo Eom, Won-Young Lee, Jongmin Kim, Sanghyuk Yoon, Baekkyu Choi, Seokhong Kwon, Joon-Young Park, Seung-Jun Bae, Yong-Cheol Bae, Jung-Hwan Choi, Seong-Jin Jang, Gyo-Young Jin |
A 6.4Gb/s/pin at sub-1V supply voltage TX-interleaving technique for mobile DRAM interface. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Shih-Hao Huang, Wei-Zen Chen |
A 25-Gb/s, -10.8-dBm input sensitivity, PD-bandwidth tolerant CMOS optical receiver. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Karthikeyan Reddy, Siladitya Dey 0002, Sachin Rao, Brian Young, Praveen Prabha, Pavan Kumar Hanumolu |
A 54mW 1.2GS/s 71.5dB SNDR 50MHz BW VCO-based CT ΔΣ ADC using dual phase/frequency feedback in 65nm CMOS. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Si-Duk Sung, Sung-Wan Hong, Jun-Suk Bang, Ji-Seon Paek, Seung-Chul Lee, Thomas Byunghak Cho, Gyu-Hyeong Cho |
86.55% Peak efficiency envelope modulator for 1.5W 10MHz LTE PA without AC coupling capacitor. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Dongsuk Jeon, Qing Dong 0001, Yejoong Kim, Xiaolong Wang, Shuai Chen, Hao Yu 0001, David T. Blaauw, Dennis Sylvester |
A 23mW face recognition accelerator in 40nm CMOS with mostly-read 5T memory. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Michael Fausten, Thorsten Huck, Armin Ruhle, Tuelin Baysal, Robert Kornhaas |
Automated driving - Impacts on the vehicle architecture. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Hyeongseok Kim, Gyouho Kim, Yoonmyung Lee, Zhiyoong Foo, Dennis Sylvester, David T. Blaauw, David D. Wentzloff |
A 10.6mm3 fully-integrated, wireless sensor node with 8GHz UWB transmitter. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Scott Sills, Shuichiro Yasuda, Alessandro Calderoni, Christopher Cardon, Jonathan Strand, Katsuhisa Aratani, Nirmal Ramaswamy |
Challenges for high-density 16Gb ReRAM with 27nm technology. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Tadaaki Yamauchi, Hiroyuki Kondo, Koji Nii |
Automotive low power technology for IoT society. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Tejasvi Anand, Kofi A. A. Makinwa, Pavan Kumar Hanumolu |
A self-referenced VCO-based temperature sensor with 0.034°C/mV supply sensitivity in 65nm CMOS. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Wei-Hsuan Wu, Wei-Cheng Sun, Chia-Hsiang Yang, Yeong-Luh Ueng |
A 794Mbps 135mW iterative detection and decoding receiver for 4×4 LDPC-coded MIMO systems in 40nm. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Jaeduk Han, Yue Lu 0007, Nicholas Sutardja, Kwangmo Jung, Elad Alon |
A 60Gb/s 173mW receiver frontend in 65nm CMOS technology. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Christian Bachmann, Maja Vidojkovic, Xiongchuan Huang, Maarten Lont, Yao-Hong Liu, Ming Ding 0003, Benjamin Busze, Jordy Gloudemans, Hans Giesen, Adnane Sbai, Gert-Jan van Schaik, Nauman F. Kiyani, Kouichi Kanda, Kazuaki Oishi, Shoichi Masui, Kathleen Philips, Harmke de Groot |
A 3.5mW 315/400MHz IEEE802.15.6/proprietary mode digitally-tunable radio SoC with integrated digital baseband and MAC processor in 40nm CMOS. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Chul Kim, Siddharth Joshi, Chris M. Thomas, Sohmyung Ha, Abraham Akinin, Lawrence E. Larson, Gert Cauwenberghs |
A CMOS 4-channel MIMO baseband receiver with 65dB harmonic rejection over 48MHz and 50dB spatial signal separation over 3MHz at 1.3mW. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Sang Min Lee 0014, Dongwon Seo, Shahin Mehdizad Taleie, Derui Kong, Michael Joseph McGowan, Tongyu Song, Ganesh R. Saripalli, Jenny Kuo, Seyfi S. Bazarjani |
A 14b 750MS/s DAC in 20nm CMOS with <-168dBm/Hz noise floor beyond Nyquist and 79dBc SFDR utilizing a low glitch-noise hybrid R-2R architecture. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Koji Takinami, Naganori Shirakata, Koichiro Tanaka, Takayuki Tsukizawa, Hiroyuki Motozuka, Yohei Morishita, Kenji Miyanaga, Takenori Sakamoto, Tomoya Urushihara, Masashi Kobayashi, Hiroshi Takahashi, Masatake Irie, Hiroyuki Yoshikawa, Atsushi Yoshimoto, Maki Nakamura, Takeaki Watanabe, Hiroshi Komori, Noriaki Saito |
A 60GHz wireless transceiver employing hybrid analog/digital beamforming with interference suppression for multiuser gigabit/s radio access. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Alessandro Cevrero, Cosimo Aprile, Pier Andrea Francese, U. Bapst, Christian Menolfi, Matthias Braendli, Marcel A. Kossel, Thomas Morf, Lukas Kull, Hazar Yueksel, Ilter Oezkaya, Yusuf Leblebici, Volkan Cevher, Thomas Toifl |
A 5.9mW/Gb/s 7Gb/s/pin 8-lane single-ended RX with crosstalk cancellation scheme using a XCTLE and 56-tap XDFE in 32nm SOI CMOS. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Dina El-Damak, Anantha P. Chandrakasan |
Solar energy harvesting system with integrated battery management and startup using single inductor and 3.2nW quiescent power. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Iman Madadi, Massoud Tohidian, Koen Cornelissens, Patrick Vandenameele, Robert Bogdan Staszewski |
A TDD/FDD SAW-less superheterodyne receiver with blocker-resilient band-pass filter and multi-stage HR in 28nm CMOS. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Ting-Kuei Kuan, Shen-Iuan Liu |
A digital bang-bang phase-locked loop with automatic loop gain control and loop latency reduction. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Kyung-Hoae Koo, Liqiong Wei, John Keane 0001, Uddalak Bhattacharya, Eric A. Karl, Kevin Zhang 0001 |
A 0.094um2 high density and aging resilient 8T SRAM with 14nm FinFET technology featuring 560mV VMIN with read and write assist. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Eric Shiu, Simon Prakash |
System challenges and hardware requirements for future consumer devices: From wearable to ChromeBooks and devices in-between. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Lingyu Hong, Simon McManus, Haw Yang, Kaushik Sengupta |
A fully integrated CMOS fluorescence biosensor with on-chip nanophotonic filter. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Hiroaki Yoda, E. Kitagawa, Naoharu Shimomura, S. Fujita, Minoru Amano |
The progresses of MRAM as a memory to save energy consumption and its potential for further reduction. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Alireza Sharif Bakhtiar, Anthony Chan Carusone |
A 19.6-Gbps CMOS optical receiver with local feedback IIR DFE. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Phillip M. Nadeau, Arun Paidimarri, Anantha P. Chandrakasan |
4.2 pW timer for heavily duty-cycled systems. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Yida Duan, Elad Alon |
A 6b 46GS/s ADC with >23GHz BW and sparkle-code error correction. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Mahmood Khayatzadeh, Fabio Frustaci, David T. Blaauw, Dennis Sylvester, Massimo Alioto |
A reconfigurable sense amplifier with 3X offset reduction in 28nm FDSOI CMOS. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Kiarash Gharibdoust, Armin Tajalli, Yusuf Leblebici |
A 4×9 Gb/s 1 pJ/b NRZ/multi-tone serial-data transceiver with crosstalk reduction architecture for multi-drop memory interfaces in 40nm CMOS. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | David Shan, Phillip J. Restle, Doug Malone, Robert A. Groves, Eric Lai, Michael Koch 0009, Jason Hibbeler, Yong Kim, Christos Vezyrtzis, Jan Feder, David Hogenmiller, Thomas J. Bucelot |
Resonant clock mega-mesh for the IBM z13TM. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhiqiang Huang, Howard Cam Luong |
A dithering-less 54.79-to-63.16GHz DCO with 4-Hz frequency resolution using an exponentially-scaling C-2C switched-capacitor ladder. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Liechao Huang, Josue Sanz-Robinson, Tiffany Moy, Yingzhe Hu, Warren Rieutort-Louis, Sigurd Wagner, James C. Sturm, Naveen Verma |
Reconstruction of multiple-user voice commands using a hybrid system based on thin-film electronics and CMOS. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Joseph Palackal Mathew, Long Kong, Behzad Razavi |
A 12-bit 200-MS/s 3.4-mW CMOS ADC with 0.85-V supply. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Taehun Yoon, Joon-Yeong Lee, Kwangseok Han, Jeong-Sup Lee, Sangeun Lee, Taeho Kim, Hyosup Won, Jinho Park, Hyeon-Min Bae |
A 100-GbE reverse gearbox IC in 40nm CMOS for supporting legacy 10- and 40-GbE standards. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Chul Kim, Sohmyung Ha, Jiwoong Park, Abraham Akinin, Patrick P. Mercier, Gert Cauwenberghs |
A 144MHz integrated resonant regulating rectifier with hybrid pulse modulation. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Rajesh Inti, Sudip Shekhar, Ganesh Balamurugan, James E. Jaussi, Clark Roberts, Tzu-Chien Hsueh, Bryan Casper |
A 0.5-to-0.75V, 3-to-8 Gbps/lane, 385-to-790 fJ/b, bi-directional, quad-lane forwarded-clock transceiver in 22nm CMOS. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Chia-Hong Jan, F. Al-amoody, H.-Y. Chang, T. Chang, Y.-W. Chen, N. Dias, Walid M. Hafez, Doug B. Ingerly, M. Jang, Eric Karl, S. K.-Y. Shi, K. Komeyli, H. Kilambi, A. Kumar, K. Byon, C.-G. Lee, J. Lee, T. Leo, P.-C. Liu, N. Nidhi, R. Olac-vaw, C. Petersburg, K. Phoa, Chetan Prasad, C. Quincy, R. Ramaswamy, T. Rana, L. Rockford, Aravinth Subramaniam, C. Tsai, Peter Vandervoorn, L. Yang, A. Zainuddin, Peng Bai |
A 14 nm SoC platform technology featuring 2nd generation Tri-Gate transistors, 70 nm gate pitch, 52 nm metal pitch, and 0.0499 um2 SRAM cells, optimized for low power, high performance and high density SoC products. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Yongsu Lee, Kiseok Song, Hoi-Jun Yoo |
A 4.84mW 30fps dual frequency division multiplexing electrical impedance tomography SoC for lung ventilation monitoring system. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Saurabh Saxena, Guanghua Shu, Romesh Kumar Nandwana, Mrunmay Talegaonkar, Ahmed Elkholy, Tejasvi Anand, Seong Joong Kim, Woo-Seok Choi, Pavan Kumar Hanumolu |
A 2.8mW/Gb/s 14Gb/s serial link transceiver in 65nm CMOS. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Myungjoon Choi, Suyoung Bang, Tae-Kwang Jang, David T. Blaauw, Dennis Sylvester |
A 99nW 70.4kHz resistive frequency locking on-chip oscillator with 27.4ppm/ºC temperature stability. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Adam E. Mendrela, Jihyun Cho, Jeffrey A. Fredenburg, Cynthia A. Chestek, Michael P. Flynn, Euisik Yoon |
Enabling closed-loop neural interface: A bi-directional interface circuit with stimulation artifact cancellation and cross-channel CM noise suppression. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Mina Kim, Seojin Choi, Jaehyouk Choi |
A 450-fs jitter PVT-robust fractional-resolution injection-locked clock multiplier using a DLL-based calibrator with replica-delay-cells. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Kyeongryeol Bong, Injoon Hong, Gyeonghoon Kim, Hoi-Jun Yoo |
A 0.5-degree error 10mW CMOS image sensor-based gaze estimation processor with logarithmic processing. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Nam-Seog Kim, Jan M. Rabaey |
A 1Gb/s energy efficient triple-channel UWB-based cognitive radio. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Sarvesh H. Kulkarni, Zhanping Chen, Balaji Srinivasan, Brian Pedersen, Uddalak Bhattacharya, Kevin Zhang 0001 |
Low-voltage metal-fuse technology featuring a 1.6V-programmable 1T1R bit cell with an integrated 1V charge pump in 22nm tri-gate process. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Yukihide Tsuji, Xu Bai, Makoto Miyamura, Toshitsugu Sakamoto, Munehiro Tada, Naoki Banno, Koichiro Okamoto, Noriyuki Iguchi, Nobuyuki Sugii, Hiromitsu Hada |
Sub-μW standby power, <18 μW/DMIPS@25MHz MCU with embedded atom-switch programmable logic and ROM. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Ming-Shuan Chen, Mau-Chung Frank Chang, Chih-Kong Ken Yang |
A low-PDP and low-area repeater using passive CTLE for on-chip interconnects. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Neha Sinha, Mansour Rachid, Sudhakar Pamarti |
A sharp programmable passive filter based on filtering by Aliasing. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Guowen Wei, Pradeep Shettigar, Feng Su, Xinyu Yu, Tom Kwan |
A 13-ENOB, 5 MHz BW, 3.16 mW multi-bit continuous-time ΔΣ ADC in 28 nm CMOS with excess-loop-delay compensation embedded in SAR quantizer. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | C. Lu, C. H. Lee, T. Nishimura, A. Toriumi |
Design and demonstration of reliability-aware Ge gate stacks with 0.5 nm EOT. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
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| 1 | Saleh Heidary Shalmany, Gottfried Beer, Dieter Draxelmayr, Kofi A. A. Makinwa |
A fully integrated ±5A current-sensing system with ±0.25% gain error and 12μΑ offset from -40°C to +85°C. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
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| 1 | Yasumasa Tsukamoto, Masao Morimoto, Makoto Yabuuchi, Miki Tanaka, Koji Nii |
1.8 Mbit/mm2 ternary-CAM macro with 484 ps search access time in 16 nm Fin-FET bulk CMOS technology. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | João L. A. de Melo, João Goes, Nuno Paulino 0002 |
A 0.7 V 256 μW ΔΣ modulator with passive RC integrators achieving 76 dB DR in 2 MHz BW. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
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| 1 | Toru Kondo, Yoshiaki Takemoto, Kenji Kobayashi, Mitsuhiro Tsukimura, Naohiro Takazawa, Hideki Kato, Shunsuke Suzuki, Jun Aoki, Haruhisa Saito, Yuichi Gomi, Seisuke Matsuda, Yoshitaka Tadaki |
A 3D stacked CMOS image sensor with 16Mpixel global-shutter mode and 2Mpixel 10000fps mode using 4 million interconnections. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
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| 1 | Xuan Zhang 0001, Mario Lok, Tao Tong, Simon Chaput, Sae Kyu Lee, Brandon Reagen, Hyunkwang Lee, David M. Brooks, Gu-Yeon Wei |
A multi-chip system optimized for insect-scale flapping-wing robots. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Adam Fuks |
Sensor-hub sweet-spot analysis for ultra-low-power always-on operation. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
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| 1 | Suyoung Bang, Jae-sun Seo, Inhee Lee, Seokhyeon Jeong, Nathaniel Ross Pinckney, David T. Blaauw, Dennis Sylvester, Leland Chang |
A fully-integrated 40-phase flying-capacitance-dithered switched-capacitor voltage regulator with 6mV output ripple. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
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| 1 | Takayuki Onishi, Takashi Sano, Yukikuni Nishida, Kazuya Yokohari, Jia Su, Ken Nakamura, Koyo Nitta, Kimiko Kawashima, Jun Okamoto, Naoki Ono, Ritsu Kusaba, Atsushi Sagata, Hiroe Iwasaki, Mitsuo Ikeda, Atsushi Shimizu |
Single-chip 4K 60fps 4: 2: 2 HEVC video encoder LSI with 8K scalability. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
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| 1 | N. Sugii, G. Jurczak, Masanao Yamaoka, A. Molnar, J. Tham, T. Piliszczuk, O. Nalamasu, J. Hausner, Shu Tanaka, Tadaaki Yamauchi, S. Sivaram, C. Diaz, W. Dai |
Technology/circuits joint evening panel discussion semiconductor industry in 2020: Evolution or revolution? |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
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| 1 | Shunichi Wakashima, Fumiaki Kusuhara, Rihito Kuroda, Shigetoshi Sugawa |
A linear response single exposure CMOS image sensor with 0.5e- readout noise and 76ke- full well capacity. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Fang-Li Yuan, Rakesh Kumar Palani, Sina Basir-Kazeruni, Hundo Shin, Anindya Saha, Ramesh Harjani, Dejan Markovic |
A throughput-agnostic 11.9-13.6GOPS/mW multi-signal classification SoC for cognitive radios in 40nm CMOS. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Supreet Jeloka, Naveen Akesh, Dennis Sylvester, David T. Blaauw |
A configurable TCAM/BCAM/SRAM using 28nm push-rule 6T bit cell. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Shengshuo Lu, Zhengya Zhang, Marios C. Papaefthymiou |
1.32GHz high-throughput charge-recovery AES core with resistance to DPA attacks. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Takashi Takenaka, Hiroaki Inoue, Takeo Hosomi, Yuichi Nakamura 0002 |
FPGA-accelerated complex event processing. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Liang Wu, Xianbo Li, Wing Cheung Chong, Zhaojun Liu, Fengyu Che, Babar Hussain, Kei May Lau, C. Patrick Yue |
An AMLED microdisplay driver SoC with built-in 1.25-Mb/s VLC transmitter. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Jri Lee, Ping-Chuan Chiang, Chih-Chi Weng |
56Gb/s PAM4 and NRZ SerDes transceivers in 40nm CMOS. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | An Steegen |
Technology innovation in an IoT Era. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Kuan-I Wu, I-Shing Shen, Christina F. Jou, Charlie Chung-Ping Chen |
A -194 dBc/Hz FOM interactive current-reused QVCO (ICR-QVCO) with capacitor-coupling self-switching sinusoidal current biasing (CSSCB) phase noise reduction technique. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
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| 1 | Paul N. Whatmough, George Smart, Shidhartha Das, Yiannis Andreopoulos, David M. Bull |
A 0.6V all-digital body-coupled wakeup transceiver for IoT applications. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Myungjoon Choi, Junhua Gu, David T. Blaauw, Dennis Sylvester |
Wide input range 1.7μW 1.2kS/s resistive sensor interface circuit with 1 cycle/sample logarithmic sub-ranging. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Y.-S. Shu, Naveen Verma, K. Yano, T. Someya, H.-J. Yoo, Karthik Vasanth, David T. Blaauw, L. Krishnamurthy, S. J. Kim |
Circuits evening panel discussion 2: Wearable electronics: Still an oasis or just a mirage for the semiconductor industry? |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Shengchang Cai, Ehsan Zhian Tabasy, Ayman Shafik, Shiva Kiran, Sebastian Hoyos, Samuel Palermo |
A 25GS/s 6b TI binary search ADC with soft-decision selection in 65nm CMOS. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Rajiv V. Joshi, Matthew M. Ziegler, Holger Wetter, C. Wandel, Herschel A. Ainspan |
14nm FinFET based supply voltage boosting techniques for extreme low Vmin operation. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Brian Zimmer, Yunsup Lee, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Ben Keller, Stevo Bailey, Milovan Blagojevic, Pi-Feng Chiu, Hanh-Phuc Le, Po-Hung Chen, Nicholas Sutardja, Rimas Avizienis, Andrew Waterman, Brian C. Richards, Philippe Flatresse, Elad Alon, Krste Asanovic, Borivoje Nikolic |
A RISC-V vector processor with tightly-integrated switched-capacitor DC-DC converters in 28nm FDSOI. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Matthew J. Turnquist, Markus Hiienkari, Jani Mäkipää, Ruzica Jevtic, Elina Pohjalainen, Tanja Kallio, Lauri Koskinen |
Fully integrated DC-DC converter and a 0.4V 32-bit CPU with timing-error prevention supplied from a prototype 1.55V Li-ion battery. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Sungchun Jang, Sungwoo Kim, Sang-Hyeok Chu, Gyu-Seob Jeong, Yoonsoo Kim, Deog-Kyoon Jeong |
An all-digital bang-bang PLL using two-point modulation and background gain calibration for spread spectrum clock generation. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Hae-Kang Jung, Jaemo Yang, Jeonghun Lee, Hyeongjun Ko, Hyuk Lee, Taeksang Song, Jongjoo Shim, Sangkwon Lee, Keunsoo Song, Dongkyun Kim, Hyungsoo Kim, Yunsaing Kim |
A 4.35Gb/s/pin LPDDR4 I/O interface with multi-VOH level, equalization scheme, and duty-training circuit for mobile applications. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Zeshan Ahmad, Kenneth K. O |
0.65-0.73THz quintupler with an on-chip antenna in 65-nm CMOS. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Jun-Suk Bang, Hyunsik Kim, Sang-Hui Park, Kiduk Kim, Sung-Won Choi, Ohjo Kwon, Choongsun Shin, Joohyung Lee, Gyu-Hyeong Cho |
Hybrid driver IC for real-time TFT non-uniformity compensation of ultra high-definition AMOLED display. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Joonseok Yang, Minbok Lee, Myeong-Jae Park, Sung-Youb Jung, Jaeha Kim |
A 2.5-V, 160-μJ-output piezoelectric energy harvester and power management IC for batteryless wireless switch (BWS) applications. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | P. Yue, Bing J. Sheu, A. Matsuzawa, K. Asada, L. Loh, Kofi A. A. Makinwa, Shekhar Borkar, Vladimir Stojanovic |
Circuits evening panel discussion 1: Is university circuit design research and education keeping up with industry needs? |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Shuhei Tanakamaru, Hiroki Yamazawa, Ken Takeuchi |
Privacy-protection solid-state storage (PP-SSS) system: Automatic lifetime management of internet-data's right to be forgotten. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Masayuki Takemura, Takeshi Shima, Shoji Muramatsu |
Embedded image recognition systems for advanced safety vehicles. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
|
| 1 | Pei-Wen Luo, Chi-Kang Chen, Yu-Hui Sung, Wei Wu 0024, Hsiu-Chuan Shih, Chia-Hsin Lee, Kuo-Hua Lee, Ming-Wei Li, Mei-Chiang Lung, Chun-Nan Lu, Yung-Fa Chou, Po-Lin Shih, Chung-Hu Ke, Chun Shiah, Patrick Stolt, Shigeki Tomishima, Ding-Ming Kwai, Bor-Doou Rong, Nicky Lu, Shih-Lien Lu, Cheng-Wen Wu |
A computer designed half Gb 16-channel 819Gb/s high-bandwidth and 10ns low-latency DRAM for 3D stacked memory devices using TSVs. |
VLSIC |
2015 |
DBLP DOI BibTeX RDF |
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