| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Sumit Kumar, Gaurab Banerjee |
An Improved Charge-Pump Design to Increase Tuning Range and Reduce Spurs in FMCW Radar Synthesizers.  |
VLSID  |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Sneha Lahiri, Megha Kesh, Rupsa Mandal, Anirban Bhattacharjee, Sovan Bhattacharya, Dola Sinha, Chandan Bandyopadhyay, Laxmidhar Biswal, Robert Wille, Rolf Drechsler |
A Dynamic Programming Based Graph Traversal Approach for Efficient Implementation of Nearest Neighbor Architecture in 2D. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Ishan Mishra, Ganpat Anant Parulekar, Shalabh Gupta |
A Compact Low-Power 29 Gb/s Pseudo Random Quaternary Sequence Generator in 65 nm CMOS. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Syed Asrar ul Haq, Varun Singh, Bhanu Teja Tanaji, Sumit Darak |
Low Complexity High Speed Deep Neural Network Augmented Wireless Channel Estimation. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Yathin Kumar Attuluri, Ruchit Chudasama, Kailash Prasad, Joycee Mekie |
FP-ATM: A Flexible Floating Point NOR Adder Tree Macro for In-Memory Computing. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Priyanka Panigrahi, Vignesh Ravichandra Rao, Thockchom Birjit Singha, Chandan Karfa |
SRIL: Securing Registers from Information Leakage at Register Transfer Level. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Subhadeep Dolai, Ekata Mitra |
Optimizing Medical Image Analysis: Leveraging Efficient Hardware and AI Algorithms. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Swathi Kumar Vembu, Anupam Chattopadhyay, Sayandeep Saha |
Authenticating Edge Neural Network through Hardware Security Modules and Quantum-Safe Key Management. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Raghavendra Kumar Sakali, Sreehari Veeramachaneni, Sk. Noor Mahammad |
Fault-Tolerant Floating-Point Multiplier Design for Mission Critical Systems. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Saloni Tandon |
A method to accurately simulate and detect transition time instants in piecewise linear SMPS circuits. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Ankit Bende, Simranjeet Singh, Chandan Kumar Jha 0001, Tim Kempen, Felix Cüppers, Christopher Bengel, Andre Zambanini, Dennis Nielinger, Sachin B. Patkar, Rolf Drechsler, Rainer Waser, Farhad Merchant, Vikas Rana |
Experimental Validation of Memristor-Aided Logic Using 1T1R TaOx RRAM Crossbar Array. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | S. Deepanjali, Ayesha Shaik, Sk. Noor Mahammad, S. Beautlin |
Evolvable Hardware for Fault Mitigation in Control Circuits. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Prakhar Diwan, Suryakant Toraskar, Varun Venkitaraman, Nirmal Kumar Boran, Chandramani Chaudhary, Virendra Singh |
MIST: Many-ISA Scheduling Technique for Heterogeneous-ISA Architectures. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Somen Adhikary, Ritesh Das, Mousumi Basu |
Broadband spectrum generation in Silicon nanocrystal-based dual-slot waveguide. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Vinod Viswanath, Kanad Chakraborty |
DFT Static Verification using Early RTL Exploration and Debug for Mobile SoC and Edge AI Applications. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Kaustabha Ray, Ansuman Banerjee |
Autonomous Automotives on the Edge. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Shivendra Singh, Ekta Tiwari, Abhinav Gupta, Sneh Saurabh |
Improving Retention Time of 1T DRAM using Electrostatic Barrier: Proposal and Analysis. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Abhishek Ramdas Nair, Pallab Kumar Nath, Shantanu Chakrabartty, Chetan Singh Thakur |
Multiplierless In-filter Computing for tinyML Platforms. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Srujana Krishnamurthy Pillay |
A 0.8V, Tri-State Inverter based SRAM Cell for SoC Applications. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Juneet Kumar Meka, Satya AmarKant Marupureddy, Ranga Vemuri |
Pattern Based Synthetic Benchmark Generation for Hardware Security Applications. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Dantu Nandini Devi, Gandi Ajay Kumar, Bindu G. Gowda, Madhav Rao |
OEDASA: Optimization Enabled Error-Diluted Approximate Systolic Array Design for an Image Processing Application. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Vinay Rayapati, Sanampudi Gopala Krishna Reddy, Gandi Ajay Kumar, Gogireddy Ravi Kiran Reddy, Madhav Rao |
EBACA: Efficient Bfloat16-based Activation Function Implementation Using Enhanced CORDIC Architecture. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Kanupriya Varshney, Mani Shankar Yadav, Devarshi Mrinal Das, Brajesh Rawat |
Finding a Promising Oxide Material for Resistive Random Access Memory with Graphene Electrode. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Shriharsh Prasad Behera, Mahesh Vaidya, Alok Naugarhiya |
Low Loss Gate Engineered Superjunction Insulated Gate Bipolar Transistor for High Speed Application. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Jugal Gandhi, Rishi Agarwal, Anish Mall, Diksha Shekhawat, M. Santosh, Jai Gopal Pandey |
SAT and SCOPE Attacks on Deceptive Multiplexer Logic Locking. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Anshul Verma, Bishnu Prasad Das |
A Low Power Dual-Band Sub-Sampling Phase Locked Loop with sub-100 fs RMS Jitter and jitter. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Vijay Kumar, Goldy, Kolin Paul, Mahesh Chowdhary |
Long Short Term Memory (LSTM)-based Cuffless Continuous Blood Pressure Monitoring. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Suraj Mandal, Debapriya Basu Roy |
KiD: A Hardware Design Framework Targeting Unified NTT Multiplication for CRYSTALS-Kyber and CRYSTALS-Dilithium on FPGA. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Indrajit Das, Hari Kishore Kakara, Vasudeva Reddy, Venkata Vanukuru |
A 7.1 GHz +23.7 dBm OIP3 1-dB NF Cascode LNA for next-generation Wi-Fi using a 130 nm SOI CMOS Technology. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Debanjan Mallik, Sumana Ghosh |
An Efficient Neural Network Controller for Autonomous Lane-Keeping Assist System. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Sayan Sarkar, Abhishek Anand |
An Integrated Multipurpose Low-Power Electrochemical Readout Interface with On-Chip Input Waveform Generator. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Suriya Srinivasan, Ranga Vemuri |
Trojan Localization Using Information Flow Tracking Properties in SoC Designs. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Soumen Bajpayee, Imon Mukherjee |
Analysis of the Effects of Crosstalk Errors on Various Quantum Circuits. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Sandipan Sinha, Manish Trivedi, Jaswinder Singh, Sriharsha Enjapuri, Deepesh Gujjar, Ramesh Halli, Girishankar Gurumurthy |
A 3nm Ultra High-Speed (4.5GHz) SRAM Cache Design With Wide DVFS Range. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Amisha Srivastava, Sneha Thakur, Abraham Peedikayil Kuruvila, Poras T. Balsara, Kanad Basu |
Hardware-based Detection of Malicious Firmware Modification in Microgrids. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Soumendu Kumar Ghosh, Shamik Kundu, Arnab Raha, Deepak A. Mathaikutty, Vijay Raghunathan |
HARVEST: Towards Efficient Sparse DNN Accelerators using Programmable Thresholds. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | J. Dhurga Devi, Bama Srinivasan, Selvi Ravindran, Ranjani Parthasarathi, P. V. Ramakrishna, Lakshmanan Balasubramanian |
Machine Learning based Waveform Predictions using Discrete Wavelet Transform for Automated Verification of Analog and Mixed Signal Integrated Circuits. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Sree Ranjani Rajendran, Farimah Farahmandi, Mark M. Tehranipoor |
CAD Tools Pathway in Hardware Security. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Manoranjan Prasad, Santanu Kundu, Lennart Renker, Rakesh Ranjan |
Unlocking the Power of Machine Learning for Faster PCB Package and Board PDN Convergence. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Davide Giacomini, Maeesha Binte Hashem, Jeremiah Suarez, Amit Ranjan Trivedi |
Towards Model-Size Agnostic, Compute-Free, Memorization-based Inference of Deep Learning. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Atrayee Mishra, Binoy Krishna Ghosh, Dipankar Ghosh, Mousumi Basu |
Generation of Asymmetric Triangular Pulse by A Dispersion and Nonlinearity Engineered Silicon Core Optical Fiber. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Danny Pereria, Sumana Ghosh, Soumyajit Dey |
DRL-based Multi-Stream Scheduling of Inference Pipelines on Edge Devices. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Chandan Kumar Jha 0001, Sallar Ahmadi-Pour, Rolf Drechsler |
Input Distribution Aware Library of Approximate Adders Based on Memristor-Aided Logic. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Shengjie Xu, Clara Hobbs, Bineet Ghosh, Parasara Sridhar Duggirala, Samarjit Chakraborty |
Certifiable and Efficient Autonomous Cyber-Physical Systems Design. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Aruna Jayasena, Prabhat Mishra 0001 |
Design for Trust Utilizing Rareness Reduction. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Haimanti Chakraborty, Ranga Vemuri |
ROBUST: RTL OBfuscation USing Bi-functional Polymorphic OperaTors. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Ishan Mishra, Jayaprakash Balachandran, Wen-Sin Liew, Elad Alon, Srinivas Venkataraman, Shalabh Gupta |
Power Integrity Analysis for Interoperability of BoW Chiplet Interfaces. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Sashank Nishad, Santanu Kundu, Nicolas Richaud, S. Mallikarjun, Manoranjan Prasad, Lennart Renker |
MLESD: Machine Learning Assisted Faster On-Chip ESD Convergence Strategy. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Ayan Palchaudhuri, Anindya Sundar Dhar |
FPGA Specific Speed-Area Optimized Architectures of Arithmetic Cores with Scan Insertion for Carry Chain Based Multi-level Logic Implementation. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Praveen Karmakar, Marpina Bharani, Chandan Karfa |
Evaluating the Robustness of Large scale eFPGA-based Hardware Redaction. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Om Maheshwari, Dev Vyas, Nihar Ranjan Mohapatra |
K-means Clustering with ANN based Classification to Predict Current-Voltage Characteristics of Advanced FETs. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Chilaka Jayaram, Sreehari Rao Patri |
A sub-μW Fully Integrated Compact CMOS Temperature Sensor for Passive RFID Applications. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Monika Pokharia, Kailash Prasad, Ravi S. Hegde, Joycee Mekie |
Hybrid CMOS-Memristor Logic for Boosting the Power-Efficiency in Error Tolerant Applications. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Sowmyashree S, Hitesh Shrimali |
An On-chip Thermoelectric Cooler Controller With Improved Driving Current of 2 A at 0.5 Ω Load. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Anup J. Deka, Shobhit Tyagi |
A novel controlled shutdown scheme for DCDC converters enabling energy recycling. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Chetan Mittal, Arnab Dey, Anubhab Banerjee, Ashfakh Ali, Zia Abbas |
A 0.8-V, 593-pA Trim-free Duty-cycled All CMOS Current Reference for Ultra-Low Power IoT Applications. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Ankita Nandi, Pratik Kumar, Shantanu Chakrabartty, Chetan Singh Thakur |
Margin Propagation based Analog Soft-Gates for Probabilistic Computing. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Vrajesh Patel, Neel Shah, Aravind Krishna, Tom Glint, Abdul Ronak, Joycee Mekie |
COMPRIZE: Assessing the Fusion of Quantization and Compression on DNN Hardware Accelerators. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Suraj Singh, Somnath Hazra, Sumanta Dey, Soumyajit Dey |
Certifying Learning-Enabled Autonomous Cyber Physical Systems - A Deployment Perspective. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Monika Kumari, Manodipan Sahoo |
Sensitivity Enhancement of TMD MOSFET-Based Biosensor by Modeling and Optimization of Back Gate Parameters. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Ayyappa Koppuravuri, Haribabu Pasupuleti, Sasirekha Gvk, Jyotsna Bapat |
A High Throughput ASCON Architecture for Secure Edge IoT Devices. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Sanchari Das, Bibhu Datta Sahoo 0002 |
Closed Form Expression of Input Matching of a Wideband Single-Ended to Differential LNA. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Prashant Sonone, Pradeep R |
Structural Testing: Vmin Silicon Issues and Solutions. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Shubham Pande, Bhaswar Chakrabarti, Anjan Chakravorty |
Thermal Crosstalk Analysis in ReRAM Passive Crossbar Arrays. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | N. Vamshi Krishna, Anushka Chaudhary, Soumya J. |
FGG: Feedback Guided Generation to Accelerate Functional Coverage Closure on Network-on-Chip Processors. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Sathwika Bavikadi, Purab Ranjan Sutradhar, Amlan Ganguly, Sai Manoj Pudukotai Dinakarrao |
Reconfigurable Processing-in-Memory Architecture for Data Intensive Applications. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Nikhil Saxena, Ranga Vemuri |
Enhancing Output Corruption Through GSHE Switch Based Logic Encryption. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Saketh Gajawada, Aryan Gupta, Kailash Prasad, Joycee Mekie |
FP-BMAC: Efficient Approximate Floating-Point Bit-Parallel MAC Processor using IMC. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Vishesh Mishra, Sparsh Mittal, Nirbhay Mishra, Rekha Singhal |
Security Implications of Approximation: A Study of Trojan Attacks on Approximate Adders and Multipliers. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Haripriya R. S, Soumitro Vyapari, Jaynarayan T. Tudu |
Near-Threshold-at-Gate based Test for Stuck-on Fault in Scan-chain Testing. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Noa Aflalo, Eilam Yalon, Shahar Kvatinsky |
Bitwise Logic Using Phase Change Memory Devices Based on the Pinatubo Architecture. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Pooja Beniwal, Sneh Saurabh |
Artificial Neural Network-based Prediction and Alleviation of Congestion during Placement. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Pritam Bhattacharjee, Alak Majumder |
Design of VFC with Programmable Frequency Ramp to control on-chip switching current profile. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Soham Roy, Vishwani D. Agrawal |
An Amalgamated Testability Measure Derived from Machine Intelligence. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Akash Panzade, Deepak Kumar, Mahendra Rathor, Urbi Chatterjee |
Vig-WaR: Vigilantly Watching Ransomware for Robust Trapping and Containment. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Anand Yeolekar, Ravindra Metta, Samarjit Chakraborty |
SMT-based Control Safety Property Checking in Cyber-Physical Systems under Timing Uncertainties. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Mohit Kumar, Abhik Kumar Khan, Sudip Roy 0001, Krishnendu Chakrabarty, Sukanta Bhattacharjee |
Accelerating Fluid Loading in Sample Preparation with Fully Programmable Valve Arrays. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Sumit Saha, Prasad B. Kanyaka, Mark Lust, Nima Ghalichechian, V. Ramgopal Rao, Maryam Shojaei Baghini |
Heterogeneous CMOS-MEMS based Boost Converter for 2.4 GHz RF energy Harvester. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Jahnvi Singh, Nijwm Wary, Pradip Mandal |
Use of current-mode and voltage-mode receivers together for on-chip multipoint-to-multipoint data transmission across global interconnects. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Tamal Chowdhury, Pradip Mandal |
A Neuro Inspired Pulse Density Modulator Sensing Unipolar and Bipolar Current Signals. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Raj Kumar Choudhary, Janeel Patel, Virendra Singh |
Early Execution for Soft Error Detection. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Manu Rathore, Garrett S. Rose |
SpiCS-Net: Circuit Switched Network on Chip for Area-Efficient Spiking Recurrent Neural Networks. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Avishek Choudhury, Brototi Mondal, Kolin Paul, Biplab K. Sikdar |
LLC Block Reuse Predictor Design using Deep Learning to Mitigate Soft Error in Multicore. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | |
37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, VLSID 2024, Kolkata, India, January 6-10, 2024 |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Sreenitha Kasarapu, Sathwika Bavikadi, Sai Manoj Pudukotai Dinakarrao |
Processing-in-Memory Architecture with Precision-Scaling for Malware Detection. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Zainubia, Bipul Kumar Singh, Manish Pundir, Subhash Chander Dubey, Ambika Prasad Shah |
Parallel-Series Diode-based Ring Amplifier for Switched Capacitor Circuits. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Rohan Sinha, Devraj M. Rajagopal, Aditya Madhavan |
Voltage Mode Charge Pump Regulator with Improved Compensation and Dynamic Body Biasing Scheme. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | S. Sarath, Darshni Manekar, Rajendra P. Shukla, Chandan Yadav |
Design of MoS2 based Inverter Circuits considering Interface Trap effect. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Dibya Chowdhury, Shivdeep, Devarshi Mrinal Das |
A Pulse Oximeter and a Controller Designed for Automatic Regulation of Oxygen Concentrators. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Marichamy Divya, Siva Kumar Rapina, S. Kumaravel 0001 |
Phase frequency detector with zero-reset pulse for low-spur Phase-locked loop applications. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Enrico Fraccaroli, Seongik Jang, Logan Stach, Hoeseok Yang, Sangyoung Park, Samarjit Chakraborty |
Wear Leveling-Aware Active Battery Cell Balancing. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Joseph Sweeney, Deepali Garg, Lawrence T. Pileggi |
Quantifying the Efficacy of Logic Locking Methods. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Kuntal Chakraborty, Jai Gopal Pandey, Abir J. Mondai |
Design and Analysis of an Area and Power Efficient Programmable Delay Cell. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | B. Naresh Kumar Reddy, Y. Charan Krishna, P. Naga Satya Nitish, Sitadevi Bharatula |
Optimizing Task Scheduling in Multi-thread Real-Time Systems using Augmented Particle Swarm Optimization. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Tamal Mandal, Debraj Kundu, Sudip Roy 0001 |
Retention Time Constrained Bioassay Scheduling on Flow-Based Microfluidic Biochips with Latches. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Md. Najrul Islam, Rahul Shrestha, Shubhajit Roy Chowdhury |
Low-Complexity lassification Technique and Hardware-Efficient Classify-Unit Architecture for CNN Accelerator. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Suryansh Upadhyay, Rupshali Roy, Swaroop Ghosh |
Designing Hash and Encryption Engines using Quantum Computing. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Fatemeh Shirinzadeh, Arighna Deb, Saeideh Shirinzadeh, Abhoy Kole, Kamalika Datta, Rolf Drechsler |
In-Memory SAT-Solver for Self-Verification of Programmable Memristive Architectures. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Ashrith S. Harith, Yingdi Liu, Nilanjan Mukherjee 0001, Jeffrey Mayer |
X-Tolerant Logic BIST for Automotive Designs using Observation Scan Technology. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
|
| 1 | Vivek Kumar, Nischal Anand, Rohit Rai, Sneha Chauhan, Jyoti Patel |
Unveiling Thermal Cross Talk in 5nm Gate-All-Around Stacked Nanosheet FETs: A Machine Learning Perspective. |
VLSID |
2024 |
DBLP DOI BibTeX RDF |
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